Effective biasing active circulator with RF choke concept

Patent metadata

Field	Value
Publication number	US-9893401-B2
Application number	US-201414554995-A
Country	US
Kind code	B2
Filing date	Nov 26, 2014
Priority date	Nov 26, 2014
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

A multi-port active circulator where each of a plurality of FET transistors has (i) a gate connected to an associated port of the multi-port active circulator via a capacitor of an associated one of a plurality of first RF chokes, each of the first RF chokes being connected to a gate of an associated FET transistor of said plurality of transistors, the associated port of said associated FET transistor and to a power supply bias connection; (ii) a source connected to a common point; and (iii) a drain connected to the gate of the same FET transistor by a feedback circuit and connected to the gate of a neighboring FET transistor via a capacitor of one of a plurality of second RF chokes, each of which coupling gates and drains of neighboring FET transistors via capacitors thereof and being connected to another power supply bias connection.

First claim

What is claimed is:

1. A multi-port active circulator comprising:
a. a plurality of FET transistors, a plurality of first RF chokes and a plurality of second RF chokes, where each of FET transistor of said plurality having:
(i) a gate connected to an associated port of said multi-port active circulator via a capacitor of an associated one of said plurality of first RF chokes, each of said plurality of first RF chokes being connected to a gate of an associated FET transistor of said plurality of transistors, the associated port of said associated FET transistor and to a first power supply connection;
(ii) a source connected to a common point; and
(iii) a drain connected to the gate of the same FET transistor by a feedback circuit and connected to the gate of a neighboring FET transistor via a capacitor of one of the plurality of second RF chokes, each of the plurality of second RF chokes coupling gates and drains of neighboring FET transistors via the capacitors thereof and each of the plurality of second RF chokes being connected to a second power supply connection;

b. said common point being connected by circuit means to a third power supply connection.

2. A multi-port active circulator comprising: a plurality of transistors arranged in a ring, each transistor in said ring having a first electrode coupled with a port of said multi-port active circulator via one of a first plurality of RF chokes, each RF choke of said first plurality of RF chokes having means for applying a bias voltage or current to the first electrode with which it is connected, each transistor in said ring having a second electrode coupled in common at a common point with all other second electrodes of said plurality of transistors, and each transistor in said ring having a third electrode coupled via one of a plurality of feedback circuits with the first electrode thereof and coupled with the first electrode of a neighboring transistor in said ring via one of a second plurality of RF chokes, each choke of said second plurality of RF chokes having means for applying a bias voltage or current to said third electrode, the bias voltages or currents applied via said first and second pluralities of RF chokes being in electrical communication with ground via said common point.

3. The multi-port active circulator of claim 2 wherein each transistor of said plurality of transistors is an FET and wherein each said first electrode is a gate electrode, each said second electrode is a source electrode and each said third electrode is a drain electrode.

4. The multi-port active circulator of claim 2 wherein the means for applying a bias voltage or current to the first electrode of each transistor comprises an inductor of each RF choke of said first plurality of RF chokes.

5. The multi-port active circulator of claim 2 wherein the means for applying a bias voltage or current to the third electrode of each transistor comprises an inductor of each RF choke of said second plurality of RF chokes.

6. The multi-port active circulator of claim 2 wherein the means for applying a bias voltage or current to the first electrode of each transistor comprises a resistor of each RF choke of said first plurality of RF chokes.

7. The multi-port active circulator of claim 2 wherein the means for applying a bias voltage or current to the third electrode of each transistor comprises a resistor of each RF choke of said second plurality of RF chokes.

8. The multi-port active circulator of claim 2 wherein each of said feedback circuits in said plurality thereof comprises an capacitor and a resistor connected in series.

9. Apparatus for biasing active devices in an active circulator comprising means separating a DC bias circuit path and an RF signal path sufficiently to provide a maximum RF voltage swing without providing any resistors in said DC bias circuit path to bias said active devices.

10. Apparatus for biasing FET transistors in an active circulator comprising means separating a DC bias circuit path connected to gates of said FET transistors and an RF signal path between said FET transistors sufficiently to provide a maximum RF voltage swing across the drains and sources of said FET transistors without providing any resistors in said RF signal path between said FET transistors thereby inhibiting resistive power consumption.

11. Apparatus for signal injecting and biasing a plurality of transistors arranged in a ring in a multi-port circulator, said apparatus comprising means applying the signal being injected via a separate capacitor coupled with each control electrode of said plurality of transistors in said ring and applying a first bias voltage or current via a separate inductor coupled with each control electrode of said plurality of transistors in said ring.

12. The apparatus of claim 11 wherein said transistors are FET transistors and wherein the control electrode is a gate of said FET transistors.

13. The apparatus of claim 12 wherein said FET transistors are depletion mode HEMT transistors.

14. The apparatus of claim 12 further including means connecting the gates of each of said plurality of FETs in said ring with a drain of another one of the FETs in said ring via another separate capacitor and means applying a second bias voltage or current via another separate inductor coupled with the drains of each of said plurality of FETs in said ring.

15. The apparatus of claim 14 further including means connecting the gate and the drain of each of said plurality of FETs in said ring via a feedback circuit comprising a resistor and a capacitor coupled in series.

16. A multi-port active circulator comprising:
a. a plurality of transistors arranged in a ring with a plurality of first RF chokes and a plurality of second RF chokes, where each of transistor of said plurality having:
(i) a control electrode connected with an associated port of said multi-port active circulator via a capacitor of an associated one of said first RF chokes, each of said first RF chokes being connected to a control electrode of an associated transistor of said plurality of transistors, the associated port of said associated transistor and to a first power supply connection;
(ii) a first current carrying electrode connected to a common point; and
(iii) a second current carrying electrode connected to the control electrode of the same transistor by a feedback circuit and connected to the control electrode of a neighboring transistor via a capacitor of one of the second RF chokes, each of the second RF chokes coupling control electrodes and second current carrying electrodes of neighboring transistors via the capacitors thereof and each of the second RF chokes being connected to a second power supply connection;

b. said common point being connected with a third power supply connection.

17. The multi-port active circulator of claim 16 wherein each of said transistors is a HEMT.

18. The multi-port active circulator of claim 16 wherein the multi-port active circulator is used as a building block to form a multi-port active circulator having an even greater number of ports than the multi-port active circulator of claim 16 .

19. An apparatus for signal injecting and biasing a plurality of field effect transistors arranged in a ring in a multi-port circulator having a plurality of ports for receiving signals to be injected, said apparatus comprising a first plurality of capacitors and a first plurality of inductors, each one of said first plurality of capacitors connecting a gate of one of said field effect transistors in said rin

Assignees

• Hrl Lab Llc

Inventors

• Kang Jongchan
• Sharifi Hasan
• Prophet Eric M

Classifications

• H03H11/38 Primary

  One-way transmission networks, i.e. unilines · CPC title

• H01P1/383 Primary

  Junction circulators, e.g. Y-circulators · CPC title

• H03H11/16

  Networks for phase shifting · CPC title