Effective biasing active circulator with rf choke concept

US2016149558A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016149558-A1
Application numberUS-201414554995-A
CountryUS
Kind codeA1
Filing dateNov 26, 2014
Priority dateNov 26, 2014
Publication dateMay 26, 2016
Grant date

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Abstract

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A multi-port active circulator where each of plurality of FET transistors has (i) a gate connected to an associated port of the multi-port active circulator via a capacitor of an associated one of a plurality of first RF chokes, each of the first RF chokes being connected to a gate of an associated FET transistor of said plurality of transistors, the associated port of said associated FET transistor and to a power supply bias connection; (ii) a source connected to a common point; and (iii) a drain connected to the gate of the same FET transistor by a feedback circuit and connected to the gate of a neighboring FET transistor via a capacitor of one of a plurality of second RF chokes, each of which coupling gates and drains of neighboring FET transistors via capacitors thereof and being connected to another power supply bias connection.

First claim

Opening claim text (preview).

1 . A multi-port active circulator comprising: a. a plurality of FET transistors, a plurality of first RF chokes and a plurality of second RF chokes, where each of FET transistor of said plurality having: (i) a gate connected to an associated port of said multi-port active circulator via a capacitor of an associated one of said first RF chokes, each of said first RF chokes being connected to a gate of an associated FET transistor of said plurality of transistors, the associated port of said associated FET transistor and to a first power supply connection; (ii) a source connected to a common point; and (iii) a drain connected to the gate of the same FET transistor by a feedback circuit and connected to the gate of a neighboring FET transistor via a capacitor of one of the second RF chokes, each of the second RF chokes coupling gates and drains of neighboring FET transistors via the capacitors thereof and each of the second RF chokes being connected to a second power supply connection; b. said common point being connected by circuit means to a third power supply connection. 2 . A multi-port active circulator comprising: a plurality of transistors, arranged in a ring, each transistor in said ring having a first electrode coupled with a port of said multi-port active circulator via one of a first plurality of RF chokes, each RF choke of said first plurality of RF chokes having means for applying a bias voltage or current to the first electrode with which it is connected, each transistor in said ring having a second electrode coupled in common at a common point with all other second electrodes of said plurality of transistors, and each transistor in said ring having a third electrode coupled via one of a plurality of feedback circuits with the first electrode thereof and coupled with the first electrode of a neighboring transistor in said ring via one of a second plurality of RF chokes, each choke of said second plurality of RF chokes having means for applying a bias voltage or current to said third electrode, the bias voltages or currents applied via said first and second pluralities of RF chokes being in electrical communication with ground via said common point. 3 . The multi-port active circulator of claim 2 wherein each transistor of said plurality of transistors is an FET and wherein each said first electrode is a gate electrode of one of said FETs, each said second electrode is a source electrode of one of said FETs and each said third electrode is a drain electrode of one of said FETs. 4 . The multi-port active circulator of claim 2 wherein the means for applying a bias voltage or current to the first electrode of each RF choke of said first plurality of RF chokes comprises an inductor. 5 . The multi-port active circulator of claim 2 wherein the means for applying a bias voltage or current to the third electrode of each RF choke of said second plurality of RF chokes comprises an inductor. 6 . The multi-port active circulator of claim 2 wherein the means for applying a bias voltage or current to the first electrode of each RF choke of said first plurality of RF chokes comprises a resistor. 7 . The multi-port active circulator of claim 2 wherein the means for applying a bias voltage or current to the third electrode of each RF choke of said second plurality of RF chokes comprises a resistor. 8 . The multi-port active circulator of claim 2 wherein each of said feedback circuits in said plurality thereof comprise an capacitor and a resistor connected in series. 9 . Apparatus for biasing active devices in an active circulator comprising means separating a DC bias circuit path and an RF signal path sufficiently to provide a maximum RF voltage swing without providing any resistors in said DC bias circuit path thereby inhibiting DC power consumption through resistors. 10 . Apparatus for biasing FET transistors in an active circulator comprising means separating a DC bias circuit path and an RF signal path between said FET transistors sufficiently to provide a maximum RF voltage swing across the drains and sources of said FET transistors without providing any resistors in said RF signal path between said FET transistors thereby inhibiting resistive power consumption. 11 . Apparatus for signal injecting and biasing a plurality of transistors arranged in a ring in a multi-port circulator, said apparatus comprising means applying the signal being injected via a separate capacitor coupled with each control electrode of said plurality of transistors in said ring and applying a first bias voltage or current via a separate inductor coupled with each control electrode of said plurality of transistors in said ring. 12 . The apparatus of claim 11 wherein said transistors are FET transistors and wherein the control electrode is the gate of said FET transistors. 13 . The apparatus of claim 12 wherein said FET transistors are depletion mode HEMT transistors. 14 . The apparatus of claim 12 further including means connecting the gates of each of said plurality of FETs in said ring with a drain of another one of the FETs in said ring via another separate capacitor and means applying a second bias voltage or current via another separate inductor coupled with the drains of each of said plurality of FETs in said ring. 15 . The apparatus of claim 14 further including means connecting the gates of each of said plurality of FETs in said ring the gate base of the said FET via a feedback circuit comprising a resistor and a capacitor coupled in series. 16 . A multi-port active circulator comprising: a. a plurality of transistors arranged in a ring with a plurality of first RF chokes and a plurality of second RF chokes, where each of transistor of said plurality having: (i) a control electrode connected with an associated port of said multi-port active circulator via a capacitor of an associated one of said first RF chokes, each of said first RF chokes being connected to a control electrode of an associated transistor of said plurality of transistors, the associated port of said associated transistor and to a first power supply connection; (ii) a first current carrying electrode connected to a common point; and (iii) a second current carrying electrode connected to the control electrode of the same transistor by a feedback circuit and connected to the control electrode of a neighboring transistor via a capacitor of one of the second RF chokes, each of the second RF chokes coupling control electrodes and second current carrying electrodes of neighboring transistors via the capacitors thereof and each of the second RF chokes being connected to a second power supply connection; b. said common point being connected with a third power supply connection. 17 . The multi-port active circulator of claim 16 wherein each of said transistors are a HEMT. 18 . The multi-port active circulator of claim 16 wherein the multi-port active circulator is used as a building block to form a multi-port active circulator having an even greater number of ports than the multi-port active circulator of claim 16 .

Assignees

Inventors

Classifications

  • H01P1/383Primary

    Junction circulators, e.g. Y-circulators · CPC title

  • H03H11/38Primary

    One-way transmission networks, i.e. unilines · CPC title

  • Networks for phase shifting · CPC title

  • H03H11/02Primary

    Multiple-port networks · CPC title

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What does patent US2016149558A1 cover?
A multi-port active circulator where each of plurality of FET transistors has (i) a gate connected to an associated port of the multi-port active circulator via a capacitor of an associated one of a plurality of first RF chokes, each of the first RF chokes being connected to a gate of an associated FET transistor of said plurality of transistors, the associated port of said associated FET trans…
Who is the assignee on this patent?
Hrl Lab Llc
What technology area does this patent fall under?
Primary CPC classification H01P1/383. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).