Data protection for unexpected power loss

Patent metadata

Field	Value
Publication number	US-9892798-B2
Application number	US-201514616424-A
Country	US
Kind code	B2
Filing date	Feb 6, 2015
Priority date	Sep 11, 2012
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

A data storage device receives a write data command and data. The data is stored in a buffer of the data storage device. The data storage device issues a command complete status indication. After the command complete status indication is issued, the data are stored in a primary memory of the data storage device. The primary memory comprises a first type of non-volatile memory and the buffer comprises a second type of non-volatile memory that is different from the first type of non-volatile memory.

First claim

What is claimed is:

1. A method, comprising:
receiving, in a data storage device, a write data command to store data in a primary memory of the data storage device;
storing the data in a buffer of the storage device;
after storing the data in the buffer, issuing a command complete status indication indicating that the write data command has been completed; and
after issuing the command complete status indication, storing the data in the primary memory of the storage device, wherein the primary memory comprises a first type of non-volatile memory, the buffer comprises a second type of non-volatile memory that is different from the first type of non-volatile memory.

2. The method of claim 1 , wherein the second type of non-volatile memory has faster access time than the first type of non-volatile memory.

3. The method of claim 1 , wherein:
storing the data in the primary memory comprises storing the data in flash memory; and
storing the data in the buffer comprises storing the data in one or more of STRAM, PCRAM, RRAM, and NVSRAM.

4. The method of claim 1 , further comprising:
storing mapping metadata in the buffer, the mapping metadata including mapping information between the logical block addresses of the data and a physical location of the data in the primary memory; and
after issuing the command complete status indication, storing the mapping metadata in the primary memory.

5. The method of claim 1 , further comprising:
accumulating data from multiple write data commands in the buffer until a threshold amount of data has been accumulated in the buffer; and
after the threshold amount of data has been accumulated in the buffer, storing accumulated data in the primary memory.

6. The method of claim 5 , wherein:
the primary memory comprises flash memory; and
the threshold amount of accumulated data is one logical page of data.

7. The method of claim 5 wherein:
the primary memory comprises flash memory; and
the threshold amount of accumulated data is one physical page of data.

8. The method of claim 5 wherein the primary memory comprises multi-level flash memory and the threshold amount of accumulated data is sufficient to allow at least one page of accumulated data to be stored in the flash memory; and
further comprising:
reading one or more pages from each physical page in the at least one block of the primary memory where the at least one page is to be stored;
storing the other pages in the buffer; and
after the at least one page has been accumulated, storing the page and the other pages in the physical page of the primary memory.

9. The method of claim 8 , wherein reading the other pages occurs before accumulating the page.

10. The method of claim 8 , wherein reading the other pages occurs during accumulating the page.

11. The method of claim 1 , further comprising:
counting numbers of times regions of logical blocks within the data storage device have been written;
accumulating data from multiple write data commands in the buffer; and
determining if regions of logical blocks are infrequently-written or frequently-written based on the numbers; and
storing data for the infrequently-written regions of logical blocks into primary memory before storing data for the frequently-written regions of logical blocks.

12. The method of claim 1 , further comprising updating metadata that provides status of the write operation.

13. The method of claim 12 , wherein updating the metadata comprises updating the metadata to indicate a write operation is in progress after the write data command is received.

14. The method of claim 12 , wherein updating the metadata comprises updating the metadata to indicate that the data have been received.

15. The method of claim 12 , wherein updating the metadata comprise updating the metadata to indicate that the write operation is complete after storing the data in the primary memory.

16. A device, comprising:
an interface configured to receive a write data command and data;
a primary memory comprising a first type of non-volatile memory, wherein the write data command is a write data command to store data in the primary memory;
a buffer comprising a second type of non-volatile memory different from the first type of non-volatile memory; and
a controller configured to:
cause the data to be stored in the buffer;
after the data are stored in the buffer, issue a command complete status indication indicating the write data command is complete; and
after the command complete status indication is issued, cause the data to be stored in the primary memory.

17. The device of claim 16 , wherein the second memory type comprises one or more of non-volatile static random-access memory (NVSRAM), phase-change memory (PCM), resistive random-access memory (RRAM), spin-torque RAM (STRAM), and magnetic RAM (MRAM).

18. The device of claim 16 , wherein the device comprises a solid state drive and the first memory type comprises flash memory.

19. The device of claim 16 wherein the device comprises a hybrid drive.

20. The device of claim 16 wherein the controller is configured to pre-compensate for write disturb effects when the data are stored in the primary memory.

Assignees

• Seagate Technology Llc

Inventors

• Trantham Jon
• Steiner Michael Joseph
• Khoueir Antoine

Classifications

• G11C16/3418 Primary

  Disturbance prevention or evaluation; Refreshing of disturbed memory data · CPC title

• G11C11/5621

  using charge storage in a floating gate · CPC title

• G11C5/143 Primary

  Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels (G11C5/148 takes precedence); Switching between alternative supplies (G11C5/141 takes precedence) · CPC title

• G11C16/14

  Circuits for erasing electrically, e.g. erase voltage switching circuits · CPC title

• G11C16/3409

  Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step · CPC title