Vertical PN silicon modulator
US-9523870-B2 · Dec 20, 2016 · US
US9891450B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9891450-B2 |
| Application number | US-201615084645-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 30, 2016 |
| Priority date | Sep 16, 2015 |
| Publication date | Feb 13, 2018 |
| Grant date | Feb 13, 2018 |
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An E/O phase modulator may include a waveguide having an insulating substrate, a single-crystal silicon strip and a polysilicon strip of a same thickness and doped with opposite conductivity types above the insulating substrate, and an insulating interface layer between the single-crystal silicon strip and polysilicon strip. Each of the single-crystal silicon strip and polysilicon strip may be laterally continued by a respective extension, and a respective electrical contact coupled to each extension.
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That which is claimed is: 1. A capacitive modulator comprising: a waveguide comprising an insulating substrate, a single-crystal silicon strip disposed above the insulating substrate, the single-crystal silicon strip being doped with a first conductivity type, a polysilicon strip disposed above the insulating substrate, the polysilicon strip being doped with a second conductivity type opposite the first conductivity type, an interface layer comprising an insulating layer between the single-crystal silicon strip and the polysilicon strip, wherein the single-crystal silicon strip and the polysilicon strip each comprise a first portion directly contacting the interface layer, a second portion thinner than the first portion, and a third portion, wherein the second portion is disposed between the first portion and the third portion, and an electrical contact coupled to the third portion of the single-crystal silicon strip, wherein the first portion and the second portion of the single-crystal silicon strip are doped to a first doping concentration, the third portion of the single-crystal silicon strip is doped to a second doping concentration greater than the first doping concentration, and wherein the first portion of the single-crystal silicon strip and the first portion of the polysilicon strip are of a same first thickness. 2. The capacitive modulator of claim 1 , wherein adjacent surfaces of the single-crystal silicon strip and polysilicon strip are corrugated. 3. The capacitive modulator of claim 1 , wherein the second portion of the single-crystal silicon strip and the second portion of the polysilicon strip have a substantially same second thickness. 4. The capacitive modulator of claim 1 , wherein the third portion of the single-crystal silicon strip and the third portion of the polysilicon strip each have the same first thickness, and wherein the electrical contact is vertically aligned with the third portion of the single-crystal silicon strip. 5. The capacitive modulator of claim 1 , wherein the interface layer further comprises a silicon-germanium layer between the insulating layer and the single-crystal silicon strip. 6. The capacitive modulator of claim 1 , wherein the insulating layer comprises silicon oxide. 7. The capacitive modulator of claim 1 , wherein the insulating layer has a thickness less than 10 nm. 8. The capacitive modulator of claim 1 , further comprising an insulator coating the single-crystal silicon strip and the polysilicon strip, wherein an optical index of the insulator and an optical index of the insulating substrate are smaller than an optical index of the single-crystal silicon strip and the polysilicon strip. 9. A capacitive modulator comprising: a first waveguide coupled to a second waveguide and a third waveguide at a first region of the first waveguide, the second and third waveguides coupled to each other and a fourth waveguide at a second region of the fourth waveguide, the second waveguide comprising an insulating substrate, a single-crystal silicon strip disposed above the insulating substrate, the single-crystal silicon strip being doped with a first conductivity type, a polysilicon strip disposed above the insulating substrate, the polysilicon strip being doped with a second conductivity type opposite the first conductivity type, an interface layer comprising an insulating layer between the single-crystal silicon strip and polysilicon strip, wherein the single-crystal silicon strip and the polysilicon strip each comprise a first portion directly contacting the interface layer, a second portion thinner than the first portion, and a third portion, wherein the second portion is disposed between the first portion and the third portion, and an electrical contact coupled to the third portion of the single-crystal silicon strip, wherein the first portion and the second portion of the single-crystal silicon strip are doped to a first doping concentration, the third portion of the single-crystal silicon strip is doped to a second doping concentration greater than the first doping concentration, wherein the first portion of the single-crystal silicon strip and the first portion of the polysilicon strip are of a same first thickness. 10. The capacitive modulator of claim 9 , wherein adjacent surfaces of the single-crystal silicon strip and polysilicon strip are corrugated. 11. The capacitive modulator of claim 9 , wherein the second portion of the single-crystal silicon strip and the second portion of the polysilicon strip have a substantially same second thickness. 12. The capacitive modulator of claim 9 , wherein the third portion of the single-crystal silicon strip and the third portion of the polysilicon strip each have the same first thickness, and wherein the electrical contact is vertically aligned with the third portion of the single-crystal silicon strip. 13. The capacitive modulator of claim 9 , wherein the interface layer further comprises a silicon-germanium layer between the insulating layer and the single-crystal silicon strip. 14. A capacitive modulator comprising: a first waveguide comprising an insulating substrate, a single-crystal silicon region disposed above the insulating substrate, the single-crystal silicon region being doped with a first conductivity type, a polysilicon region disposed above the insulating substrate, the polysilicon region being doped with a second conductivity type opposite the first conductivity type, an interface layer comprising an insulating layer between the single-crystal silicon region and the polysilicon region, wherein the single-crystal silicon region and the polysilicon region each comprise a strip having an upper surface at a first height, a lateral extension comprising a first portion and a second portion, the first portion having an upper surface at the first height, wherein the second portion extends from the strip to the first portion, and wherein the second portion of the lateral extension of the strip has an upper surface at a second height less than the first height, and a contact over the first portion, wherein the strip and the second portion of the lateral extension of the single-crystal silicon region are doped to a first doping concentration, and wherein the first portion of the lateral extension of the single-crystal silicon region is doped to a second doping concentration greater than the first doping concentration. 15. The capacitive modulator of claim 14 , wherein the lateral extension of the single-crystal silicon region extends on a first side of the interface layer; and wherein the lateral extension of the polysilicon region extends on a second side of the interface layer, the second side being opposite to the first side. 16. The capacitive modulator of claim 14 , wherein the single-crystal silicon region is laterally continued, on a side of the interface layer opposite to the lateral extension of the single-crystal silicon region, by an additional extension having a thickness less than that of the strip of the single-crystal silicon region. 17. The capacitive modulator of claim 16 , wherein the additional extension has a same thickness as the second portion of the lateral extension of the single-crystal silicon region. 18. The capacitive modulator of claim 14 , wherein the second portion of the lateral extension of the polysilicon region has a thickness less than that of the strip of the polysilicon region. 19. The capacitive modulator of claim 14 , further comprising an insulator layer over the firs
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