Electro-optical modulator with a vertical capacitor structure

US9310629B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9310629-B2
Application numberUS-201414266397-A
CountryUS
Kind codeB2
Filing dateApr 30, 2014
Priority dateJan 24, 2014
Publication dateApr 12, 2016
Grant dateApr 12, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. As opposed to a horizontal SISCAP structure where the dielectric layer is disposed between upper and lower waveguides, arranging the dielectric layer between waveguides disposed on the same plane results in a vertical SISCAP structure. In one embodiment, the leftmost and rightmost waveguide are both made from crystalline silicon.

First claim

Opening claim text (preview).

What is claimed is: 1. An optical device, comprising: a right crystalline silicon waveguide disposed on a dielectric substrate; a left crystalline silicon waveguide disposed on the dielectric substrate, wherein the right and left waveguides are disposed on a same plane defined by the dielectric substrate, and wherein the right and left waveguides have respective, opposing first and second sides; and a vertical region separating the right and left waveguides, the vertical region extending vertically from the dielectric substrate to an upper surface of one of the right and left waveguides opposite a lower surface contacting the dielectric substrate, wherein the vertical region is filled with a dielectric material contacting the respective first sides of the left and right waveguides, wherein the left and right waveguides comprise respective raised wing portions that extend in a direction away from the dielectric substrate, the wing portions are located at the respective second sides of the left and right waveguides, wherein the left waveguide is doped a first conductivity type and the right waveguide is doped a second, different conductivity type. 2. The optical device of claim 1 , wherein the vertical region has a width that is less than 15 nanometers. 3. The optical device of claim 1 , wherein a first electrical connection is coupled to an upper surface of the wing portion of the left waveguide and a second electrical connection is coupled to an upper surface of the wing portion of the right waveguide. 4. The optical device of claim 1 , wherein the respective wing portions are more heavily doped with the first and second conductivity types, respectively, relative to remaining portions of the left and right waveguides. 5. The optical device of claim 1 , wherein a dielectric ridge at least partially overlaps the vertical region, wherein a width of the dielectric ridge is equal to or greater than a width of the vertical region. 6. The optical device of claim 5 , wherein the dielectric ridge comprises silicon nitride. 7. An optical device, comprising: a right waveguide disposed on a dielectric substrate; a left waveguide disposed on the dielectric substrate, wherein the right and left waveguides are disposed on a same plane defined by the dielectric substrate, wherein the left waveguide is doped a first conductivity type and the right waveguide is doped a second, different conductivity type, and wherein the right and left waveguides have respective, opposing first and second sides; a vertical region separating the right and left waveguides, the vertical region extending vertically from the dielectric substrate to an upper surface of one of the right and left waveguides opposite a lower surface contacting the dielectric substrate, wherein the vertical region is filled with a dielectric material contacting the respective first sides of the left and right wavequides, wherein the left and right wavequides comprise respective raised wing portions that extend in a direction away from the dielectric substrate, the wing portions are located at the respective second sides of the left and right waveguides; and a dielectric ridge at least partially overlapping the vertical region, wherein a width of the dielectric ridge is equal to or greater than a width of the vertical region. 8. The optical device of claim 7 , wherein the vertical region has a width that is less than 15 nanometers. 9. The optical device of claim 7 , further comprising a dielectric capping layer at least partially overlapping the left and right waveguides, wherein the dielectric ridge is a feature of the dielectric capping layer. 10. The optical device of claim 7 , wherein the dielectric ridge comprises silicon nitride.

Assignees

Inventors

Classifications

  • G02F1/025Primary

    in an optical waveguide structure (G02F1/017, {G02F1/2257} take precedence) · CPC title

  • the optical waveguides being made of semiconducting material · CPC title

  • G02F1/011Primary

    in optical waveguides, not otherwise provided for in this subclass · CPC title

  • by deposition of thin films · CPC title

  • by etching · CPC title

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What does patent US9310629B2 cover?
An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, h…
Who is the assignee on this patent?
Cisco Tech Inc
What technology area does this patent fall under?
Primary CPC classification G02F1/025. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).