Planar cavity MEMS and related structures, methods of manufacture and design structures

Patent metadata

Field	Value
Publication number	US-9890039-B2
Application number	US-201615212896-A
Country	US
Kind code	B2
Filing date	Jul 18, 2016
Priority date	Jun 25, 2010
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a beam structure and an electrode on an insulator layer, remote from the beam structure. The method further includes forming at least one sacrificial layer over the beam structure, and remote from the electrode. The method further includes forming a lid structure over the at least one sacrificial layer and the electrode. The method further includes providing simultaneously a vent hole through the lid structure to expose the sacrificial layer and to form a partial via over the electrode. The method further includes venting the sacrificial layer to form a cavity. The method further includes sealing the vent hole with material. The method further includes forming a final via in the lid structure to the electrode, through the partial via.

First claim

What is claimed:

1. A method of forming at least one Micro-Electro-Mechanical System (MEMS), comprising:
forming a first sacrificial layer over discrete wires;
forming a beam over the first sacrificial layer;
forming an insulator layer on the first sacrificial layer;
forming a cavity via in the insulator layer, exposing a portion of the first sacrificial layer;
forming an electrode on the insulator layer;
forming a second sacrificial layer over the beam and in the cavity via;
forming a lid material over the second sacrificial layer and the electrode;
providing simultaneously a vent hole in the lid material to expose at least the second sacrificial layer and to form a partial via over the electrode;
venting the first sacrificial layer and the second sacrificial layer to form at least a lower cavity and an upper cavity, respectively;
sealing the vent hole with a dielectric material and a nitride cap;
forming a polyimide material on the nitride cap; and
forming a final via through the lid material by etching the lid through the partial via, to the electrode,
wherein the partial via is formed at a same time as the vent hole, and after venting the first sacrificial layer and the second sacrificial layer, the vent hole is sealed with the dielectric material and the nitride cap,
the first sacrificial layer and the second sacrificial layer are silicon material vented using a XeF 2 etchant through the vent hole, and
the dielectric material, the nitride cap, and the polyimide material are formed in the partial via.

2. A method of forming at least one Micro-Electro-Mechanical System (MEMS), comprising:
forming a first sacrificial layer over discrete wires;
forming a beam over the first sacrificial layer;
forming an insulator layer on the first sacrificial layer;
forming a cavity via in the insulator layer, exposing a portion of the first sacrificial layer;
forming an electrode on the insulator layer;
forming a second sacrificial layer over the beam and in the cavity via;
forming a lid material over the second sacrificial layer and the electrode;
providing simultaneously a vent hole in the lid material to expose at least the second sacrificial layer and to form a partial via over the electrode;
venting the first sacrificial layer and the second sacrificial layer to form at least a lower cavity and an upper cavity, respectively;
sealing the vent hole with a dielectric material and a nitride cap;
forming a polyimide material on the nitride cap; and
forming a final via through the lid material by etching the lid through the partial via, to the electrode,
wherein the partial via is formed at a same time as the vent hole, and after venting the first sacrificial layer and the second sacrificial layer, the vent hole is sealed with the dielectric material and the nitride cap, and
the dielectric material, the nitride cap, and the polymide material are formed in the partial via.

3. The method of claim 1 , wherein the beam and upper cavity are remote from the electrode.

4. The method of claim 1 , wherein the vent hole is rounded or chamfered.

5. The method of claim 1 , wherein the vent hole is octagonal.

6. The method of claim 1 , wherein the first sacrificial layer and the second sacrificial layer are silicon layers.

7. The method of claim 1 , wherein the final via is formed by using two separate patterning and etching steps.

8. A method of forming at least one Micro-Electro-Mechanical System (MEMS), comprising:
forming a first sacrificial layer over discrete wires;
forming a beam over the first sacrificial layer;
forming an insulator layer on the first sacrificial layer;
forming a cavity via in the insulator layer, exposing a portion of the first sacrificial layer;
forming an electrode on the insulator layer;
forming a second sacrificial layer over the beam and in the cavity via;
forming a lid material over the second sacrificial layer and the electrode;
providing simultaneously a vent hole in the lid material to expose at least the second sacrificial layer and to form a partial via over the electrode;
venting the first sacrificial layer and the second sacrificial layer to form at least a lower cavity and an upper cavity, respectively;
sealing the vent hole with material, the material comprises dielectric material and a nitride cap;
forming a polyimide material on the nitride cap;
forming a final via through the lid material by etching the lid through the partial via, to the electrode; and
etching the partial via to form the final via to expose an underlying electrode,
wherein the dielectric material, the nitride cap, and the polyimide material are formed in the partial via.

9. The method of claim 8 , wherein the final via is formed by using two separate patterning and etching steps to form the final via with two different cross sections.

10. The method of claim 8 , wherein the final via has a tapered angle.

11. The method of claim 8 , wherein the partial via has a larger cross section diameter than an underlying via which results in the final via.

12. The method of claim 8 , wherein the underlying electrode is composed of Ti/AlCu/Ti/Tn and is formed over an insulator layer.

13. The method of claim 7 , wherein the two separate patterning and etching steps reduce an etching time to expose the electrode.

14. The method of claim 1 , wherein the vent holes are provided greater than 5 microns away from both the partial via and the final via.

Assignees

• IBM

Inventors

• Herrin Russell T
• Maling Jeffrey C
• Stamper Anthony K

Classifications

• Y10T29/4913

  Assembling to base an electrical component, e.g., capacitor, etc. · CPC title

• Y10T29/49105

  Switch making · CPC title

• B81B2203/04

  Electrodes · CPC title

• B81C1/00476 Primary

  removing a sacrificial layer (B81C1/00912 takes precedence) · CPC title

• B81B2203/0118

  Cantilevers · CPC title