Delta-sigma modulator and modulation method, transmission device, and transmission method

Patent metadata

Field	Value
Publication number	US-9887705-B2
Application number	US-201515528164-A
Country	US
Kind code	B2
Filing date	Nov 18, 2015
Priority date	Dec 5, 2014
Publication date	Feb 6, 2018
Grant date	Feb 6, 2018

Abstract

The purpose of the present invention is to provide a high-power-efficiency and low-design-cost transmission device by implementing, with a constant clock, delta-sigma modulation maintaining a zero current switching property in an amplifier. This delta-sigma modulator comprises: a pulse phase signal generation unit for generating a pulse phase signal from a phase signal; a delta-sigma modulation unit for generating a pulse amplitude signal obtained by delta-sigma modulating an amplitude signal with a constant clock; a phase sorting unit for outputting a control signal on the basis of the phase signal; a delay switching unit for delaying the pulse amplitude signal on the basis of the control signal; and a mixing unit for outputting a pulse string obtained by multiplying together the delayed pulse amplitude signal and the pulse phase signal.

First claim

What is claimed is:

1. A delta-sigma modulator including:
a pulse phase signal generation circuit that generates a pulse phase signal from a phase signal;
a delta-sigma modulation circuit that generates a pulse amplitude signal obtained by delta-sigma modulating an amplitude signal with a constant clock;
a phase sorting circuit that outputs, based on the phase signal, a control signal;
a delay switching circuit that delays, based on the control signal, the pulse amplitude signal; and
a mixing circuit that outputs a pulse string obtained by multiplying the delayed pulse amplitude signal by the pulse phase signal.

2. The delta-sigma modulator according to claim 1 , wherein the delay switching circuit delays the pulse amplitude signal in such a manner that a timing at which the pulse amplitude signal changes from Low to High occurs when the pulse phase signal is Low.

3. The delta-sigma modulator according to claim 1 , wherein the phase sorting circuit sorts, based on preset region division, the phase signal, and outputs, based on the sorting, the control signal.

4. The delta-sigma modulator according to claim 1 , wherein the phase sorting circuit determines which region of N (N is a positive integer) divided regions k×360/N° to (k+1)×360/N° (k is an integer from 0 to N-1) a value of the phase signal is included, and outputs the control signal corresponding to a determination result.

5. The delta-sigma modulator according to claim 1 , wherein the delay switching circuit delays the pulse amplitude signal by a delay amount k/(Nfc) (fc is a carrier frequency) (k is an integer from 0 to N-1) in accordance with the control signal.

6. The delta-sigma modulator according to claim 1 , further including a delay amount adjustment circuit that applies a delay that makes a delay amount of the delayed pulse amplitude signal constant regardless of the control signal, to the amplitude signal in accordance with the control signal.

7. The delta-sigma modulator according to claim 1 , further including a duty difference detection circuit that detects a difference in a duty ratio between an output of the delta-sigma modulation circuit and an output of the delay switching circuit, and adds the difference in the duty ratio after scaling to an operation of the delta-sigma modulation circuit.

8. A delta-sigma modulation method including:
generating a pulse phase signal from a phase signal;
generating a pulse amplitude signal obtained by delta-sigma modulating an amplitude signal with a constant clock;
delaying, based on the phase signal, the pulse amplitude signal; and
outputting a pulse string obtained by multiplying the delayed pulse amplitude signal by the pulse phase signal.

9. A transmission device including a signal generator, a delta-sigma modulator, an amplifier, and a band-pass filter, wherein
the signal generator generates a baseband signal as an input signal,
the delta-sigma modulator includes:
a digital baseband circuit that generates an IQ signal from the baseband signal;
an amplitude-phase conversion circuit that converts the IQ signal into an amplitude signal and a phase signal;
a pulse phase signal generation circuit that generates a pulse phase signal from the phase signal;
a delta-sigma modulation circuit that generates a pulse amplitude signal obtained by delta-sigma modulating the amplitude signal with a constant clock;
a phase sorting circuit that outputs, based on the phase signal, a control signal;
a delay switching circuit that delays, based on the control signal, the pulse amplitude signal; and
a mixing circuit that outputs a pulse string obtained by multiplying the delayed pulse amplitude signal by the pulse phase signal,

the amplifier amplifies the pulse string, and
the band-pass filter generates an output signal obtained by reconstructing the amplified input signal by passing the amplified pulse string.

Assignees

• Nec Corp

Inventors

• Tanio Masaaki
• Hori Shinichi

Classifications

• H03M7/304 Primary

  with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage · CPC title

• H03F3/245

  with semiconductor devices only · CPC title

• H03M7/3015

  Structural details of digital delta-sigma modulators · CPC title

• H03M7/3011

  of non-linear distortion, e.g. by temporarily adapting the operation upon detection of instability conditions (avoiding instability by structural design H03M7/3035) · CPC title

• H04L27/36

  Modulator circuits; Transmitter circuits · CPC title