Electronic package and method of connecting a first die to a second die to form an electronic package

Patent metadata

Field	Value
Publication number	US-9887104-B2
Application number	US-201414323077-A
Country	US
Kind code	B2
Filing date	Jul 3, 2014
Priority date	Jul 3, 2014
Publication date	Feb 6, 2018
Grant date	Feb 6, 2018

Abstract

Some embodiments relate to an electronic package. The electronic package includes a substrate and a die attached to the substrate. The electronic package further includes an underfill positioned between the die and the substrate due to capillary action. A support surrounds the die. The support provides the same beneficial fillet geometry on all die edges. Therefore, the support provides similar stress reduction on all die edges. Other embodiments relate to method of fabricating an electronic package. The method includes attaching a die to a substrate and inserting an underfill between the die and the substrate using capillary action. The method further includes placing a support around the die such that the support surrounds the die.

First claim

The invention claimed is:

1. An electronic package comprising:
a substrate;
a die attached to the substrate;
an underfill positioned between the die and the substrate due to capillary action; and
a support completely surrounding the die, wherein the support has an inner lower edge and an outer lower edge, the support including a passage and an outer surface, the passage extending from the inner lower edge of the support to the outer surface of the support such that the underfill flows from the outer surface through the passage to the inner lower edge when the support is mounted around the die.

2. The electronic package of claim 1 , wherein the passage extends from the outer surface of the support on one side of the support.

3. The electronic package of claim 1 , wherein the die is flip chip bonded to the substrate.

4. The electronic package of claim 1 , wherein the underfill secures the support to the substrate.

5. The electronic package of claim 1 , wherein the underfill secures the support to the die.

6. The electronic package of claim 1 , wherein the support has a substantially uniform cross-section.

7. The electronic package of claim 1 , wherein the cross-section of the support changes such that the cross-section is larger in areas of relatively higher stress on the die and smaller in areas of relatively lower stress on the die.

Assignees

• Intel Corp

Inventors

• Dubey Manish
• Dias Rajendra C
• Nardi Patrick
• Woodhams David

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/07331

  Connecting techniques · CPC title

• H10W72/856

  Bump connectors and die-attach connectors (bumps embedded in underfills H10W74/15) · CPC title

• H10W76/47

  Solid or gel fillings · CPC title