Method of manufacturing a temperature-compensated micro-electromechanical device

Patent metadata

Field	Value
Publication number	US-9878903-B2
Application number	US-201414271009-A
Country	US
Kind code	B2
Filing date	May 6, 2014
Priority date	Oct 8, 2004
Publication date	Jan 30, 2018
Grant date	Jan 30, 2018

Abstract

Methods of forming micro-electromechanical device include a semiconductor substrate, in which a first microstructure and a second microstructure of reference are integrated. The first microstructure and the second microstructure are arranged in the substrate so as to undergo equal strains as a result of thermal expansions of the substrate. Furthermore, the first microstructure is provided with movable parts and fixed parts with respect to the substrate, while the second microstructure has a shape that is substantially symmetrical to the first microstructure but is fixed with respect to the substrate. By subtracting the changes in electrical characteristics of the second microstructure from those of the first, variations in electrical characteristics of the first microstructure caused by changes in thermal expansion or contraction can be compensated for.

First claim

The invention claimed:

1. A method, comprising:
forming a first suspended mass in a semiconductor substrate, the first suspended mass being coupled to the semiconductor substrate and movable with respect to the semiconductor substrate, the first suspended mass including a first plurality of movable electrodes that are capacitively coupled to a first plurality of fixed electrodes; and
forming a second suspended mass in the semiconductor substrate, the second suspended mass including a second plurality of fixed electrodes that are capacitively coupled to a third plurality of fixed electrodes, the second suspended mass and the second plurality of fixed electrodes being rigidly coupled to the semiconductor substrate to prevent movement of the second suspended mass and the second plurality of fixed electrodes relative to the semiconductor substrate, the first suspended mass and the second suspended mass being configured to undergo equal strains as a result of thermal expansion of the semiconductor substrate.

2. The method according to claim 1 wherein:
forming the first suspended mass comprises forming spring structures by which the first suspended mass is coupled to the semiconductor substrate, and
forming the second suspended mass comprises forming rigid structures by which the second suspended mass is coupled to the semiconductor substrate.

3. The method according to claim 1 wherein forming the second suspended mass comprises forming the second suspended mass so as to be the same as, and symmetrical with, the first suspended mass.

4. The method according to claim 1 wherein forming the first suspended mass comprises forming the first suspended mass so as to be movable along a first axis, with respect to the semiconductor substrate, the method comprising:
forming a third mass in the semiconductor substrate, including forming a third suspended mass that is coupled to the semiconductor substrate so as to be movable along a second axis with respect to the semiconductor substrate, the second axis lying perpendicular to the first axis; and
forming a fourth mass in the semiconductor substrate so that the third mass and the fourth mass undergo equal strains as a result of thermal expansions of the semiconductor substrate, including forming a fourth suspended mass that is coupled to the semiconductor substrate so as to be rigidly fixed to the semiconductor substrate.

5. The method according to claim 1 , comprising:
detecting a first signal by the first suspended mass;
detecting a second signal by the second suspended mass; and
generating a third signal compensated in temperature on the basis of the first signal and of the second signal.

6. The method according to claim 5 , wherein generating the third signal comprises subtracting the second signal from the first signal.

7. A method, comprising:
forming a first suspended mass in a semiconductor substrate, the first suspended mass being suspended relative to the semiconductor substrate and flexibly coupled to the semiconductor substrate to allow movement of the first suspended mass relative to the semiconductor substrate, the first suspended mass including a first plurality of movable electrodes that are capacitively coupled to a first plurality of fixed electrodes; and
forming a second suspended mass in the semiconductor substrate at the same time the first suspended mass is formed, the second suspended mass being suspended relative to the semiconductor substrate, the second suspended mass including a second plurality of fixed electrodes that are capacitively coupled to a third plurality of fixed electrodes, the second suspended mass and the second plurality of fixed electrodes being rigidly coupled to the semiconductor substrate to prevent movement of the second suspended mass and the second plurality of fixed electrodes relative to the semiconductor substrate, the first and second suspended masses being configured to undergo substantially equal strain due to thermal expansion of the semiconductor substrate.

8. The method according to claim 7 wherein:
forming the first suspended mass comprises forming spring structures that flexibly couple the first suspended mass to the semiconductor substrate, and
forming the second suspended mass comprises forming rigid structures that rigidly couple the second suspended mass to the semiconductor substrate.

9. The method according to claim 7 wherein the first suspended mass has a first shape and the second suspended mass has a second shape, the second shape being similar in shape to the first shape.

10. A method comprising:
forming a first mass in a semiconductor substrate, the first mass being suspended relative to the semiconductor substrate, the first mass having a first dimension that is moveable relative to the semiconductor substrate, the first mass including a first plurality of movable electrodes that are capacitively coupled to a first plurality of fixed electrodes; and
forming a second mass in the semiconductor substrate, the second mass being suspended relative to the semiconductor substrate, the second mass having a second dimension, the second mass including a second plurality of fixed electrodes that are capacitively coupled to a third plurality of fixed electrodes, the second mass and the second plurality of fixed electrodes being rigidly fixed to the semiconductor substrate to prevent movement of the second mass and the second plurality of fixed electrodes relative to the semiconductor substrate, the second mass being substantially equal to the first mass, the second mass being configured to undergo substantially equal strain as the first mass when the semiconductor substrate thermally expands.

11. The method according to claim 10 , wherein the first plurality of movable electrodes are configured to move relative to the semiconductor substrate in response to acceleration and thermal expansion.

12. A method comprising:
in a semiconductor substrate, forming a first mass that is suspended relative to the semiconductor substrate and configured to move relative to the semiconductor substrate, the first mass including a first plurality of movable electrodes that are capacitively coupled to a first plurality of fixed electrodes; and
in the semiconductor substrate, forming a second mass that is suspended relative to the semiconductor substrate and is symmetrical with the first mass with respect to an axis of the semiconductor substrate, the second mass including a second plurality of fixed electrodes that are capacitively coupled to a third plurality of fixed electrodes, the second mass and the second plurality of fixed electrodes being rigidly coupled to the semiconductor substrate to prevent movement of the second mass and the second plurality of fixed electrodes relative to the semiconductor substrate, the first and second masses being configured to undergo substantially equal strain due to thermal expansion of the semiconductor substrate.

13. The method according to claim 12 , wherein:
forming the first mass comprises forming spring structures that couple the first mass to the semiconductor substrate, and
forming the second mass comprises forming rigid structures that couple the second mass to the semiconductor substrate.

14. The method according to claim 13 , wherein the first mass has a first shape and the second mass has a second shape, the second shape being similar to the first shape.

15. A method comprising:
forming a micro-electromechanical device in a semiconductor substrate of semiconductor material, wherein forming includes:
forming a first body having a first mass that is suspended above and coupled t

Assignees

• St Microelectronics Srl

Inventors

• Lasalandra Ernesto
• Merassi Angelo
• Zerbini Sarah

Classifications

• B81B3/0081 Primary

  Thermal properties · CPC title

• B81C1/00158

  Diaphragms, membranes (manufacture process for semi-permeable inorganic membranes B01D67/0039) · CPC title

• G01P1/006

  used for thermal compensation · CPC title

• Y10T29/43

  Electric condenser making · CPC title

• G01P15/125

  by capacitive pick-up · CPC title