Dielectric layer and manufacturing method of dielectric layer, and solid-state electronic device and manufacturing method of solid-state electronic device

Patent metadata

Field	Value
Publication number	US-9876067-B2
Application number	US-201414778578-A
Country	US
Kind code	B2
Filing date	Mar 12, 2014
Priority date	Mar 22, 2013
Publication date	Jan 23, 2018
Grant date	Jan 23, 2018

Abstract

The invention provides a dielectric layer having high relative permittivity with low leakage current and excellent flatness. A dielectric layer 30 a according to the invention is made of multilayer oxide including a first oxide layer 31 made of oxide consisting of bismuth (Bi) and niobium (Nb) or oxide consisting of bismuth (Bi), zinc (Zn), and niobium (Nb) (possibly including inevitable impurities) and a second oxide layer 32 made of oxide of one type (possibly including inevitable impurities) selected from the group of oxide consisting of lanthanum (La) and tantalum (Ta), oxide consisting of lanthanum (La) and zirconium (Zr), and oxide consisting of strontium (Sr) and tantalum (Ta).

First claim

The invention claimed is:

1. A dielectric layer made of
multilayer oxide including a first oxide layer made of oxide consisting of bismuth (Bi) and niobium (Nb) (possibly including inevitable impurities), having atomic composition ratio of the niobium (Nb) to the bismuth (Bi) is 0.33 or more and 3 or less when the atomic composition of the bismuth (Bi) is taken as 1, and a second oxide layer made of oxide of one type (possibly including inevitable impurities) selected from the group of oxide consisting of lanthanum (La) and tantalum (Ta) having atomic composition ratio of the Tantalum (Ta) to the lanthanum (La) is 0.11 or more and 9 or less when the atomic composition of the lanthanum (La) is taken as 1, oxide consisting of lanthanum (La) and zirconium (Zr), and oxide consisting of strontium (Sr) and tantalum (Ta).

2. The dielectric layer according to claim 1 , wherein
oxide consisting of bismuth (Bi) and niobium (Nb) in the first oxide layer includes a crystal phase of a pyrochlore crystal structure.

3. The dielectric layer according to claim 1 , wherein
the first oxide layer includes a crystal phase and an amorphous phase.

4. The dielectric layer according to claim 1 , wherein
the second oxide layer includes a substantially amorphous phase.

5. A solid-state electronic device comprising:
the dielectric layer according to claim 1 .

6. The solid-state electronic device according to claim 5 , partially having
a structure including a single electrode layer and the single dielectric layer being stacked.

7. The solid-state electronic device according to claim 6 , wherein
the electrode layer is made of electrode layer oxide of one type selected from the group of oxide consisting of lanthanum (La) and nickel (Ni), oxide consisting of antimony (Sb) and tin (Sn), and oxide consisting of indium (In) and tin (Sn) (possibly including inevitable impurities).

8. The solid-state electronic device according to claim 5 , wherein
the solid-state electronic device is a capacitor.

9. A method of manufacturing a dielectric layer, the method comprising:
a first oxide layer forming step of heating in an atmosphere containing oxygen a first precursor layer obtained from a first precursor solution as a start material, of a precursor solution including a precursor containing bismuth (Bi) and a precursor containing niobium (Nb) as solutes, and forming a first oxide layer (possibly including inevitable impurities) consisting of the bismuth (Bi) and the niobium (Nb) having atomic composition ratio of the niobium (Nb) to the bismuth (Bi) is 0.33 or more and 3 or less when the atomic composition of the bismuth (Bi) is taken as 1; and
a second oxide layer forming step of heating in an atmosphere containing oxygen a second precursor layer obtained from a second precursor solution as a start material, selected from the group of a precursor solution including a precursor containing lanthanum (La) and a precursor containing tantalum (Ta) as solutes, a precursor solution including a precursor containing lanthanum (La) and a precursor containing zirconium (Zr) as solutes, and a precursor solution including a precursor containing strontium (Sr) and a precursor containing tantalum (Ta) as solutes, and forming above or below the first oxide layer a second oxide layer (possibly including inevitable impurities) consisting of the lanthanum (La) and the tantalum (Ta) having atomic composition ratio of the Tantalum (Ta) to the lanthanum (La) is 0.11 or more and 9 or less when the atomic composition of the lanthanum (La) is taken as 1 , consisting of the lanthanum (La) and the zirconium (Zr), or consisting of the strontium (Sr) and the tantalum (Ta).

10. The method of manufacturing the dielectric layer according to claim 9 , wherein
the first oxide layer is formed by heating at a heating temperature in a range from 450° C. or more to 700° C. or less, and
the second oxide layer is formed by heating at a heating temperature in a range from 250° C. or more to 700° C. or less.

11. The method of manufacturing the dielectric layer according to claim 10 , wherein
oxide consisting of bismuth (Bi) and niobium (Nb) in the first oxide layer includes a crystal phase of a pyrocholore crystal structure.

12. The method of manufacturing the dielectric layer according to claim 10 , wherein
the first oxide layer includes a crystal phase and an amorphous phase.

13. The method of manufacturing the dielectric layer according to claim 9 , wherein
oxide consisting of bismuth (Bi) and niobium (Nb) in the first oxide layer includes a crystal phase of a pyrochlore crystal structure.

14. The method of manufacturing the dielectric layer according to claim 13 , wherein
the first oxide layer includes a crystal phase and an amorphous phase.

15. The method of manufacturing the dielectric layer according to claim 9 , wherein
the first oxide layer includes a crystal phase and an amorphous phase.

16. The method of manufacturing the dielectric layer according to claim 9 , wherein the second oxide layer includes a substantially amorphous phase.

17. A method of manufacturing a solid-state electronic device, the method comprising:
a step of manufacturing the dielectric layer according to claim 9 .

18. The method of manufacturing the solid-state electronic device according to claim 17 , wherein
a first oxide layer forming step and a second oxide layer forming step
are executed between a first electrode layer forming step of forming a first electrode layer and a second electrode layer forming step of forming a second electrode layer, the first oxide layer and the second oxide layer being interposed between the first electrode layer and the second electrode layer, and
the first electrode layer forming step, the first oxide layer forming step, the second oxide layer forming step, and the second electrode layer forming step are each executed once.

19. The method of manufacturing the solid-state electronic device according to claim 18 , wherein
at least one of the first electrode layer forming step and the second electrode layer forming step includes
heating in an atmosphere containing oxygen an electrode layer precursor layer obtained from an electrode layer precursor solution as a start material, of a precursor solution including a precursor containing lanthanum (La) and a precursor containing nickel (Ni) as solutes, a precursor solution including a precursor containing antimony (Sb) and a precursor containing tin (Sn) as solutes, or a precursor solution including a precursor containing indium (In) and a precursor containing tin (Sn) as solutes, and forming electrode layer oxide (possibly including inevitable impurities) as oxide consisting of the lanthanum (La) and the nickel (Ni), oxide consisting of the antimony (Sb) and the tin (Sn), or oxide consisting of the indium (In) and the tin (Sn).

20. The method of manufacturing the solid-state electronic device according to claim 19 , wherein
at least one of the first electrode layer forming step and the second electrode layer forming step
further includes an imprinting step of imprinting the electrode layer precursor layer obtained from the electrode layer precursor solution as a start material heated at a temperature in a range from 80° C. or more to 300° C. or less in an atmosphere containing oxygen, before forming the electrode layer oxide, and forming an imprinted structure on the electrode layer precursor layer.

21. The method of manufacturing the solid-state electronic device according to

Assignees

• Japan Science & Tech Agency

Inventors

• Shimoda Tatsuya
• Tokumitsu Eisuke
• Onoue Masatoshi
• Miyasako Takaaki

Classifications

• H10P14/69397

  the material containing two or more metal elements · CPC title

• H10P14/6332

  using thermal evaporation (formation of epitaxial layers by a deposition process H10P14/6349) · CPC title

• H10P14/668

  the materials being characterised by the deposition precursor materials · CPC title

• H10P14/662

  Laminate layers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers H10P14/6508, H10P14/6548) · CPC title

• H01L28/91

  Electricity · mapped topic