Driver circuit for signal transmission and control method of driver circuit

Patent metadata

Field	Value
Publication number	US-9871539-B2
Application number	US-201615069880-A
Country	US
Kind code	B2
Filing date	Mar 14, 2016
Priority date	Jul 16, 2013
Publication date	Jan 16, 2018
Grant date	Jan 16, 2018

Abstract

A driver circuit for receiving a data input and generating an output signal to a termination element according to at least the first data input is provided. The driver circuit includes a first output terminal, a current mode drive unit and a voltage mode drive unit. The current mode drive unit is arranged for selectively outputting a first reference current from the first output terminal to the termination element according to the first data input, and selectively receiving the first reference current through the first output terminal according to the first data input. The voltage mode drive unit is arranged for coupling one of a first reference voltage and a second reference voltage different from the second reference voltage to the first output terminal according to the first data input.

First claim

What is claimed is:

1. A driver circuit for receiving a first data input and generating an output signal to a termination element according to at least the first data input, the driver circuit comprising:
a first output terminal, arranged for outputting the output signal;
a first current mode drive unit, coupled to the first output terminal, the first current mode drive unit arranged for generating a first reference current, selectively outputting the first reference current from the first output terminal to the termination element according to the first data input, and selectively receiving the first reference current through the first output terminal according to the first data input, wherein the first output terminal is coupled between the first current mode drive unit and the termination element; when the first current mode drive unit outputs the first reference current, the first current mode drive unit steers the first reference current outputted from the first output terminal to flow into the termination element such that the first reference current outputted from the first current mode drive unit flows through the termination element and is used as at least a portion of a current flowing through the termination element; and
a first voltage mode drive unit, coupled to the first output terminal, the first voltage mode drive unit arranged for coupling one of a first reference voltage and a second reference voltage to the first output terminal according to the first data input, wherein the first output terminal is coupled between the first voltage mode drive unit and the termination element, and the first reference voltage is different from the second reference voltage,
wherein the first reference voltage is greater than the second reference voltage; when the first voltage mode drive unit couples the first reference voltage to the first output terminal according to the first data input, the first current mode drive unit outputs the first reference current from the first output terminal according to the first data input and when the first voltage mode drive unit couples the second reference voltage to the first output terminal according to the first data input, the first current mode drive unit receives the first reference current through the first output terminal according to the first data input.

2. The driver circuit of claim 1 , wherein the current mode drive unit comprises:
a current source, arranged for generating the first reference current, wherein the current source is selectively coupled to the first output terminal according to the first data input; and
a current sink, arranged for receiving the first reference current, wherein the current sink is selectively coupled to the first output terminal according to the first data input;
wherein when one of the current source and the current sink is coupled to the first output terminal according to the first data input, the other of the current source and the current sink is not coupled to the first output terminal.

3. The driver circuit of claim 2 , wherein the current mode drive unit further comprises:
a first switch, selectively coupled between the current source and the first output terminal according to the first data input; and
a second switch, selectively coupled between the current sink and the first output terminal according to the first data input;
wherein when the first switch is switched on due to the first data input, the second switch is switched off; and when the first switch is switched off due to the first data input, the second switch is switched on.

4. The driver circuit of claim 1 , wherein the first voltage mode drive unit comprises:
a first switch, selectively coupled between the first reference voltage and the first output terminal according to the first data input; and
a second switch, selectively coupled between the second reference voltage and the first output terminal according to the first data input;
wherein when the first switch is switched on due to the first data input, the second switch is switched off; and when the first switch is switched off due to the first data input, the second switch is switched on.

5. The driver circuit of claim 1 , wherein the first voltage mode drive unit comprises:
an impedance element, wherein one terminal of the impedance element is coupled to the first output terminal, and another terminal of the impedance element is coupled to the first reference voltage or coupled to the second reference voltage according to the first data input.

6. The driver circuit of claim 1 , wherein the first voltage mode drive unit comprises:
a first impedance element, selectively coupled between the first reference voltage and the first output terminal according to the first data input; and
a second impedance element, selectively coupled between the second reference voltage and the first output terminal according to the first data input;
wherein when the first reference voltage is coupled to the first output terminal through the first impedance element according to the first data input, the second reference voltage is not coupled to the first output terminal; and when the second reference voltage is coupled to the first output terminal through the second impedance element according to the first data input, the first reference voltage is not coupled to the first output terminal.

7. The driver circuit of claim 1 , wherein the driver circuit is further arranged for receiving n−1 second data inputs, the driver circuit generates the output signal according to the first data input and the n−1 second data inputs, n is an integer greater than one, and the driver circuit further comprises:
n−1 second voltage mode drive units, coupled to the first output terminal and controlled by the n−1 second data inputs respectively, wherein each second voltage mode drive unit couples one of the first reference voltage and the second reference voltage to the first output terminal according to a second data input corresponding to the second voltage mode drive unit.

8. The driver circuit of claim 7 , wherein the output signal comprises n components generated in response to the first data input and the n−1 second data inputs respectively; the first data input and the n−1 second data inputs correspond to a binary code of n bits; and the n components of the output signal have a binary-weighted relationship.

9. The driver circuit of claim 7 , wherein at least one of the n−1 second data input is an advanced signal or a delayed signal relative to the first data input.

10. The driver circuit of claim 1 , wherein the driver circuit is further arranged for receiving n−1 second data inputs, the driver circuit generates the output signal according to the first data input and the n−1 second data inputs, n is an integer greater than one, and the driver circuit further comprises:
n−1 second current mode drive units, coupled to the first output terminal and controlled by the n−1 second data inputs respectively, the n−1 second current mode drive units arranged for generating n−1 second reference currents respectively, wherein each second current mode drive unit selectively outputs a second reference current corresponding to the second current mode drive unit from the first output terminal to the termination element according to a second data input corresponding to the second current mode drive unit, and selectively receives the second reference current through the first output terminal according to the second data input.

11. The driver circuit of claim 10 , wherein the output signal comprises n components generated in response to the first data input and the n−1 second data inputs respectively; the first data input and the n−1 s

Assignees

• Mediatek Inc

Inventors

• Wu Chien-Hua
• Luo Yan-Bin

Classifications

• H03K19/018585

  programmable · CPC title

• H04B1/04 Primary

  Circuits · CPC title

• H04L25/00

  Baseband systems · CPC title

• H04L25/0272

  Arrangements for coupling to multiple lines, e.g. for differential transmission · CPC title

• H03K19/017545

  Coupling arrangements; Impedance matching circuits · CPC title