Semiconductor devices and methods of fabricating the same

Patent metadata

Field	Value
Publication number	US-9324781-B2
Application number	US-201514708423-A
Country	US
Kind code	B2
Filing date	May 11, 2015
Priority date	Mar 5, 2013
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor substrate;
a storage electrode structure disposed on the semiconductor substrate;
a dielectric layer disposed on the storage electrode structure; and
a plate electrode disposed on the dielectric layer,
wherein the storage electrode structure includes a storage conductive pattern and a core buried structure,
wherein the storage conductive pattern comprises a first conductive material and surrounds a side and bottom of the core buried structure, and
wherein the core buried structure comprises a core oxide pattern that comprises an oxide of the first conductive material.

2. The semiconductor device of claim 1 ,
wherein the core buried structure further comprises a core buried pattern on the core oxide pattern, and
wherein the core oxide pattern is interposed between the core buried pattern and the storage conductive pattern.

3. The semiconductor device of claim 2 , wherein the core buried pattern comprises a metal, a metal nitride, and/or a metal oxide.

4. The semiconductor device of claim 2 , wherein the core buried pattern comprises a second conductive material having a greater hardness than the first conductive material.

5. The semiconductor device of claim 1 ,
wherein the storage conductive pattern comprises a recessed part of which a top is open, and
wherein the core oxide pattern of the core buried structure fills the recessed part of the storage conductive pattern.

6. The semiconductor device of claim 1 , wherein an upper surface of the core oxide pattern is located at a lower level than that of the storage conductive pattern.

7. The semiconductor device of claim 1 , wherein the core oxide pattern has conductive characteristics.

8. The semiconductor device of claim 1 ,
wherein the storage conductive pattern comprises a recessed part of which a top is open,
wherein the core oxide pattern of the core buried structure is formed in the recessed part of the storage conductive pattern, and
wherein the plate electrode is not formed in the recessed part of the storage conductive pattern.

9. A semiconductor device, comprising:
a semiconductor substrate;
storage electrode structures disposed on the semiconductor substrate;
a supporter pattern connecting upper parts of the storage electrode structures;
a capacitor dielectric layer disposed on the storage electrode structures and the supporter pattern; and
a plate electrode disposed on the capacitor dielectric layer,
wherein each of the storage electrode structures comprises a storage conductive pattern and a core buried structure,
wherein the storage conductive pattern comprises a first conductive material, and
wherein the core buried structure comprises a core oxide pattern comprising an oxide of the first conductive material.

10. The semiconductor device of claim 9 ,
wherein the storage conductive pattern comprises a recessed part of which a top is open, and
wherein the core buried structure is in the recessed part of the storage conductive pattern.

11. The semiconductor device of claim 10 , wherein the core buried structure further includes a core buried pattern on the core oxide pattern and filling the recessed part.

12. The semiconductor device of claim 11 , wherein the core buried pattern comprises the same material as the storage conductive pattern.

13. The semiconductor device of claim 11 , wherein the core buried pattern comprises a second conductive material having a greater hardness than the first conductive material.

14. The semiconductor device of claim 9 ,
wherein the storage conductive pattern surrounds side and bottom surfaces of the core oxide pattern, and
wherein the core oxide pattern has an upper surface located at a lower level than an upper surface of the storage conductive pattern.

15. The semiconductor device of claim 9 , wherein the supporter pattern connects side surfaces of upper parts of the storage electrode structures.

16. The semiconductor device of claim 9 , wherein the capacitor dielectric layer comprises a different material from the core oxide pattern.

17. A semiconductor device, comprising:
a semiconductor substrate;
a first electrode structure disposed on the semiconductor substrate and that comprises a first conductive pattern and a core buried structure, the first conductive pattern comprising a first conductive material that surrounds side surfaces of the core buried structure, the core buried structure comprising a core oxide pattern that is an oxide of the first conductive material;
a dielectric layer disposed on the first electrode structure; and
a plate electrode disposed on the dielectric layer,
wherein the first electrode structure comprises a first electrode and a second electrode, the device further comprising a supporter pattern that connects upper portions of the first electrode and the second electrode.

18. The semiconductor device of claim 17 , wherein the supporter pattern connects side surfaces of upper portions of the first electrode and the second electrode.

19. The semiconductor device of claim 17 ,
wherein the core buried structure further comprises a core buried pattern on the core oxide pattern, and
wherein the core oxide pattern is interposed between the core buried pattern and the first conductive pattern.

20. The semiconductor device of claim 17 ,
wherein the first conductive pattern comprises a recessed part of which a top is open,
wherein the core oxide pattern substantially fills the recessed part of the first conductive pattern, and
wherein an upper surface of the core oxide pattern is located at a lower level than that of the first conductive pattern.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Ki-Yeon
• Choi Jae-Hyoung
• Urazaev Vladimir
• Jeong Jin-Ha

Classifications

• H10P50/28

  of insulating materials · CPC title

• H10P14/40

  of conductive or resistive materials · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10D1/716

  having vertical extensions · CPC title

• H10D1/043 Primary

  using patterning processes to form electrode extensions, e.g. etching · CPC title