Reference current generating circuit and memory device

US9870807B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9870807-B2
Application numberUS-201715416446-A
CountryUS
Kind codeB2
Filing dateJan 26, 2017
Priority dateJan 28, 2016
Publication dateJan 16, 2018
Grant dateJan 16, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A reference current generating circuit includes a positive temperature coefficient current source configured to generate a first current, a value of which increases with an increase of an ambient temperature thereof, a negative temperature coefficient current source configured to generate a second current, a value of which decreases with the increase of the ambient temperature thereof, a first current adjustment circuit configured to adjust the first current in accordance with a first adjustment setting value, to thereby generate a positive temperature characteristic current, a second current adjustment circuit configured to adjust the second current in accordance with a second adjustment setting value, to thereby generate a negative temperature characteristic current, and a current amplifier configured to amplify a combined current of the positive temperature characteristic current and the negative temperature characteristic current, to thereby generate a reference current.

First claim

Opening claim text (preview).

What is claimed is: 1. A reference current generating circuit, comprising: a positive temperature coefficient current source configured to generate a plurality of first currents, a value of each of which increases with an increase of an ambient temperature thereof; a negative temperature coefficient current source configured to generate a plurality of second currents, a value of each of which decreases with the increase of the ambient temperature thereof; a first current adjustment circuit configured to generate a positive temperature characteristic current by combining the first currents based on a first adjustment setting signal; a second current adjustment circuit configured to generate a negative temperature characteristic current by combining the second currents based on a second adjustment setting signal; and a current amplifier configured to amplify a combined current of the positive temperature characteristic current and the negative temperature characteristic current, to thereby generate a reference current. 2. The reference current generating circuit according to claim 1 , wherein the first current adjustment circuit includes: a first current mirror circuit configured to generate a number N of first mirror currents respectively corresponding to the first currents, N being an integer of 2 or greater; and a first mirror current combining circuit configured to select a number M of the N first mirror currents, to thereby obtain the positive temperature characteristic current, M being an integer of 1 or greater and being equal to or less than N, M corresponding to the first adjustment setting signal, and wherein the second current adjustment circuit includes: a second current mirror circuit configured to generate a number N of second mirror currents respectively corresponding to the second currents; and a second mirror current combining circuit configured to select a number K of the N second mirror currents, to thereby obtain the negative temperature characteristic current, K being an integer of 1 or greater and being equal to or less than N, K corresponding to the second adjustment setting signal. 3. The reference current generating circuit according to claim 1 , wherein the positive temperature coefficient current source and the negative temperature coefficient current source are each made of a band-gap reference circuit. 4. A reference current generating circuit, comprising: a positive temperature coefficient current source configured to generate a first current, a value of which increases with an increase of an ambient temperature thereof; a negative temperature coefficient current source configured to generate a second current, a value of which decreases with the increase of the ambient temperature thereof; a first current adjustment circuit configured to adjust the first current in accordance with a first adjustment setting signal, to thereby generate a first positive temperature characteristic current; a second current adjustment circuit configured to adjust the second current in accordance with a second adjustment setting signal, to thereby generate a first negative temperature characteristic current; a third current adjustment circuit configured to adjust the first current in accordance with a third adjustment setting signal, to thereby generate a second positive temperature characteristic current; a fourth current adjustment circuit configured to adjust the second current in accordance with a fourth adjustment setting signal, to thereby generate a second negative temperature characteristic current; a first current amplifier configured to amplify a combined current of the first positive temperature characteristic current and the first negative temperature characteristic current, to thereby generate a first reference current; and a second current amplifier configured to amplify a combined current of the second positive temperature characteristic current and the second negative temperature characteristic current, to thereby generate a second reference current. 5. The reference current generating circuit according to claim 4 , wherein the first current adjustment circuit includes: a first current mirror circuit configured to generate a number N of first mirror currents corresponding to the first current, N being an integer of 2 or greater; and a first mirror current combining circuit configured to select a number M of the N first mirror currents, to thereby obtain the first positive temperature characteristic current, M being an integer of 1 or greater and being equal to or less than N, M corresponding to a first adjustment setting value included in the first adjustment setting signal, wherein the second current adjustment circuit includes: a second current mirror circuit configured to generate a number N of second mirror currents corresponding to the second current; and a second mirror current combining circuit configured to select a number K of the N second mirror currents, to thereby obtain the first negative temperature characteristic current, K being an integer of 1 or greater and being equal to or less than N, K corresponding to a second adjustment setting value included in the second adjustment setting signal, wherein the third current adjustment circuit includes: a third current mirror circuit configured to generate a number N of third mirror currents corresponding to the first current; and a third mirror current combining circuit configured to select a number P of the N third mirror currents, to thereby obtain the second positive temperature characteristic current, P being an integer of 1 or greater and being equal to or less than N, P corresponding to a third adjustment setting value included in the third adjustment setting signal, and wherein the fourth current adjustment circuit includes: a fourth current mirror circuit configured to generate a number N of fourth mirror currents corresponding to the second current; and a fourth mirror current combining circuit configured to select a number Q of the N fourth mirror currents, to thereby obtain the second negative temperature characteristic current, Q being an integer of 1 or greater and being equal to or less than N, Q corresponding to a fourth adjustment setting value included in the fourth adjustment setting signal. 6. The reference current generating circuit according to claim 4 , wherein the positive temperature coefficient current source and the negative temperature coefficient current source are each made of a band-gap reference circuit. 7. The reference current generating circuit according to claim 1 , further comprising a current controller configured to supply the first adjustment setting signal and the second adjustment setting signal to the first current adjustment circuit and the second current adjustment circuit, respectively. 8. The reference current generating circuit according to claim 7 , wherein the first current adjustment circuit generates a current with a predetermined positive temperature characteristic as the positive temperature characteristic current based on the first adjustment setting signal, and the second current adjustment circuit generates a current with a predetermined negative temperature characteristic as the negative temperature characteristic current based on the second adjustment setting signal. 9. A memory device, comprising: a memory cell array including a plurality of memory cells; a reference current generating circuit configured to generate a reference current, the reference current generating circuit including: a positive temperature coefficient current source configured to generate a plurality of first currents, a value of each of which increases with an increase of an ambient temperature

Assignees

Inventors

Classifications

  • using both bipolar and field-effect technology · CPC title

  • with means for avoiding disturbances due to temperature effects · CPC title

  • G11C5/147Primary

    Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence) · CPC title

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What does patent US9870807B2 cover?
A reference current generating circuit includes a positive temperature coefficient current source configured to generate a first current, a value of which increases with an increase of an ambient temperature thereof, a negative temperature coefficient current source configured to generate a second current, a value of which decreases with the increase of the ambient temperature thereof, a first …
Who is the assignee on this patent?
Lapis Semiconductor Co Ltd
What technology area does this patent fall under?
Primary CPC classification G11C5/147. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).