Storage devices for power optimization, storage systems including the same, and operating methods thereof

US2024029764A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024029764-A1
Application numberUS-202318133566-A
CountryUS
Kind codeA1
Filing dateApr 12, 2023
Priority dateJul 25, 2022
Publication dateJan 25, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

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A storage device which includes a non-volatile memory, a storage controller that is connected with the non-volatile memory and is configured to calculate a real-time power value of the storage device through at least one current value and at least one voltage value received from an ADC module, and to generate a clock control signal based on the real-time power value. The ADC module may be connected with at least one line that supplies a power to the storage device, and the ADC module may measure the at least one current value and the at least one voltage value. The storage device may include a clock adjustment unit that adjusts a plurality of clock signals used to drive the storage controller based on the clock control signal and sends the plurality of clock signals to the storage controller.

First claim

Opening claim text (preview).

What is claimed is: 1 . A storage device comprising: a non-volatile memory; a storage controller connected with the non-volatile memory, and configured to calculate a real-time power value of the storage device using at least one current value and at least one voltage value received from an ADC module, the storage controller further configured to generate a clock control signal based on the real-time power value, wherein the ADC module is connected with at least one line that…

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What does patent US2024029764A1 cover?
A storage device which includes a non-volatile memory, a storage controller that is connected with the non-volatile memory and is configured to calculate a real-time power value of the storage device through at least one current value and at least one voltage value received from an ADC module, and to generate a clock control signal based on the real-time power value. The ADC module may be conne…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G11C5/14. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jan 25 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).