Arrangement and method for monitoring a power supply

US9869727B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9869727-B2
Application numberUS-201414915524-A
CountryUS
Kind codeB2
Filing dateSep 2, 2014
Priority dateSep 4, 2013
Publication dateJan 16, 2018
Grant dateJan 16, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for monitoring a power supply connected to a superordinate controller via a signal line, wherein the superordinate controller queries whether the power supply is operating faultlessly at variable intervals, where during faultless operation, a power-good signal is continuously transmitted by the power supply to the superordinate controller via the signal line and, if a fault occurs, an indicating signal is transmitted by the power supply to the superordinate controller via the signal line as a switching sequence of high and low signals such that each signal change of the switching sequence occurs only after a time period that is longer than an expected greatest query interval and each signal of the switching sequence that does not correspond to the power-good signal is shorter than a specified signal duration for indicating a total failure of the power supply, whereby the superordinate controller receives more information than previously.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for monitoring a power supply connected via a signal line to a superordinate controller which performs queries at variable query intervals to determine whether the power supply is operating faultlessly, transmitting, by the power supply, a power-good signal to the superordinate controller via the signal line continuously during faultless operation; and transmitting an indicating signal by the power supply to the superordinate controller via the signal line as a switching sequence of high-low signals if a fault occurs such that each signal change of the switching sequence occurs only after a time period which is longer than an expected greatest query interval and such that each signal of the switching sequence which does not correspond to the power-good signal is shorter than a specified signal duration to indicate a total failure of the power supply. 2. The method as claimed in claim 1 , wherein a high signal is transmitted over the signal line to the superordinate controller by the power supply as the power-good signal. 3. The method as claimed in claim 2 , wherein a longest cycle time to be expected of the superordinate controller comprising a stored program controller is specified as the expected greatest query interval. 4. The method as claimed in claim 1 , wherein a longest cycle time to be expected of the superordinate controller comprising a stored program controller is specified as the expected greatest query interval. 5. The method as claimed in claim 1 , wherein the expected greatest query interval is approximately 150 ms. 6. The method as claimed in claim 1 , wherein each signal change of the switching sequence only occurs after a period of time that is twice as long as the expected greatest query interval. 7. The method as claimed in claim 1 , wherein each point in time of a query is stored in the superordinate controller together with a signal state of the indicating signal; and wherein the transmitted switching sequence is derived from a sequence of these stored values and a specified fixed clock of the indicating signal. 8. The method as claimed in claim 1 , wherein different types of faults are specified to the power supply; wherein each type of fault is assigned its own switching sequence; and wherein a corresponding switching sequence is transmitted to the superordinate controller as a fault-specific indicating signal if a fault occurs. 9. The method as claimed in claim 8 , wherein the power supply includes a priority level for each fault type; and wherein, for faults occurring at the same time, the transmission of the corresponding switching sequences is arranged in order of assigned priority level. 10. The method as claimed in claim 9 , wherein, when the power supply is switched on, the power supply transmits a respective identifier for each type of fault to the superordinate controller; and wherein the priority level and a repetition specification for a multiple transmission of the corresponding switching sequence are produced from the respective identifier. 11. The method as claimed in claim 8 , wherein, in accordance with a repetition specification, a first switching sequence is transmitted several times in succession to the superordinate controller; and wherein a repeated transmission is aborted and a second switching sequence is transmitted if a fault to which the second switching sequence is assigned occurs. 12. The method as claimed in claim 8 , wherein a check is made in the power supply before a successive transmission of switching sequences to the superordinate controller to determine whether another defined switching sequence is produced in a transition area of two defined switching sequences, an extended low signal or an extended high signal being transmitted between the succession of switching sequences if another defined switching sequence is produced. 13. The method as claimed in claim 8 , wherein a successive transmission of switching sequences to the superordinate controller is checked in the power supply to determine whether another defined switching sequence is produced in the transition area of two defined switching sequences, a separately predefined switching sequence being transmitted to the superordinate controller to indicate an incorrect fault message if another defined switching sequence is produced. 14. The method as claimed in claim 1 , wherein the power supply includes a tolerance period which starts to run if a fault occurs; and wherein that if a fault is present after the tolerance period has elapsed, a corresponding switching sequence is transmitted to the superordinate controller. 15. The method as claimed in claim 1 , wherein a duration of a faulty output voltage has a time limit, a recently transmitted switching sequence being interrupted and a continuous signal which does not correspond to the power-good signal being instead transmitted after expiration of said time limit. 16. The method as claimed in claim 1 , wherein the power supply is switched off for specific faults and that, after a corresponding re-activation, the power supply transmitting a corresponding switching sequence to the superordinate controller. 17. The method as claimed in claim 1 , wherein each received switching sequence recognized as a fault message is stored with a time stamp in the superordinate controller. 18. The method as claimed in claim 1 , wherein at least one output voltage of the power supply is continuously monitored; and wherein, if a dip in the at least one output voltage to a specified extent beyond a specified minimum time occurs, the corresponding switching sequence is transmitted to the superordinate controller to show the dip of the output voltage. 19. The method as claimed in claim 18 , wherein a period of time, which is longer than a longest correction time of the power supply after a jump in a load is specified as a minimum time. 20. The method as claimed in claim 1 , further comprising: monitoring a specific temperature of the power supply is continuously; and transmitting a corresponding switching sequence to the superordinate controller to indicate that a temperature has been exceeded if a limit temperature is reached. 21. The method as claimed in claim 1 , further comprising: monitoring an output current of the power supply continuously; and transmitting a corresponding switching sequence is transmitted to the superordinate controller to indicate that a threshold current has been exceeded if a threshold current value is reached. 22. An arrangement comprising: a power supply; a superordinate controller connected to the power supply connected via a signal line, said superordinate controller performing queries at variable query intervals to determine whether the power supply is operating faultlessly; wherein the arrangement is configure to: transmit, by the power supply, a power-good signal to the superordinate controller via the signal line continuously during faultless operation; and transmit an indicating signal by the power supply to the superordinate controller via the signal line as a switching sequence of high-low signals if a fault occurs such that each signal change of the switching sequence occurs only after a time period which is longer than an expected greatest query interval and such that each signal of the switching sequence which does not correspond to the power-good signal is shorter than a specified signal duration to indicate a total failure of the power supply; and

Assignees

Inventors

Classifications

  • Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

  • H03K5/125Primary

    Discriminating pulses (measuring characteristics of individual pulses G01R29/02; separation of synchronising signals in television systems H04N5/08) · CPC title

  • G01R31/40Primary

    Testing power supplies (testing photovoltaic devices H02S50/10) · CPC title

  • by superposition on the watched current · CPC title

  • Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

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What does patent US9869727B2 cover?
A method for monitoring a power supply connected to a superordinate controller via a signal line, wherein the superordinate controller queries whether the power supply is operating faultlessly at variable intervals, where during faultless operation, a power-good signal is continuously transmitted by the power supply to the superordinate controller via the signal line and, if a fault occurs, an …
Who is the assignee on this patent?
Siemens Ag
What technology area does this patent fall under?
Primary CPC classification H03K5/125. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).