Integrated circuit protection during high-current ESD testing

Patent metadata

Field	Value
Publication number	US-9869708-B2
Application number	US-201514882756-A
Country	US
Kind code	B2
Filing date	Oct 14, 2015
Priority date	Apr 13, 2012
Publication date	Jan 16, 2018
Grant date	Jan 16, 2018

Abstract

A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.

First claim

What is claimed is:

1. An electro-static discharge (ESD) test system operable to test ESD capabilities of an integrated circuit, the system comprising:
a floating ground connection;
a first plurality of switch devices;
a first plurality of contacts each operably coupled to the floating ground connection via a corresponding one of the first plurality of switch devices;
a second plurality of switch devices;
a plurality of charge storage devices each having a first terminal and a second terminal, the first terminal of each of the plurality of charge storage devices operably coupled to the floating ground connection via a corresponding one of the second plurality of switch devices; and
a second plurality of contacts each both operably coupled to one of the second plurality of switch devices within the integrated circuit and coupled to the second terminal of a corresponding one of the plurality of charge storage devices.

2. The system of claim 1 , further comprising a controller operable to control the first plurality of switch devices and the second plurality of switch devices,
wherein one of the controlled first plurality of switch devices is in a closed position and a corresponding one of the controlled second plurality of switch devices is in an open position for coupling a low-current ground to a high-current ground via the floating ground connection,
and
wherein at least a second one of the controlled first plurality of switch devices is in an open position and a corresponding at least second one of the controlled second plurality of switch devices is in an open position for receiving an ESD simulated signal,
and
wherein at least a third one of the controlled first plurality of switch devices is in an open position and a corresponding at least third one of the controlled second plurality of switch devices is in a closed position for receiving an external DC bias voltage.

3. The system of claim 1 , wherein the plurality of charge storage devices comprises a plurality of capacitor devices each having a range of about 1-100 Nanofarads (nF).

4. The system of claim 1 , further comprising:
a direct current (DC) voltage source operable to provide at least one DC bias voltage to at least one of the second plurality of contacts, wherein each of the plurality of charge storage devices associated with the at least one of the second plurality of contacts receiving the DC bias voltage is coupled to the floating ground connection by closing a corresponding one of the plurality of second switch devices associated with the at least one of the second plurality of contacts.

5. The system of claim 4 , further comprising:
an ESD signal generating device operable to provide an ESD simulated signal to at least one other of the second plurality of contacts, wherein each of the plurality of charge storage devices associated with the at least one other of the second plurality of contacts receiving the ESD simulated signal is isolated from the floating ground connection by opening a corresponding one of the plurality of second switch devices associated with the at least one other of the second plurality of contacts.

6. The system of claim 5 , further comprising:
a signal monitoring device operable to measure at least one signal variation on the at least one of the second plurality of contacts receiving the DC bias voltage, the signal variation occurring in response to the provided ESD simulated signal.

7. The system of claim 5 , wherein the ESD signal generating device comprises a transmission Line Pulse (TLP) generator.

Assignees

• IBM

Inventors

• Chang Shunhua
• Di Sarro James Paul
• Gauthier Jr Robert J
• Jack Nathan
• Mitra Souvick

Classifications

• H05K9/0067

  Devices for protecting against damage from electrostatic discharge · CPC title

• H02H9/046 Primary

  responsive to excess voltage appearing at terminals of integrated circuits · CPC title

• G01R31/2851

  Testing of integrated circuits [IC] (G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801) · CPC title

• G01R31/002 Primary

  where the device under test is an electronic circuit · CPC title

• H01L27/0248

  Electricity · mapped topic