Package structures having integrated waveguides for high speed communications between package components
US-2016276727-A1 · Sep 22, 2016 · US
US9867294B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9867294-B2 |
| Application number | US-201514720656-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 22, 2015 |
| Priority date | May 22, 2015 |
| Publication date | Jan 9, 2018 |
| Grant date | Jan 9, 2018 |
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A waveguide. The waveguide may include a first waveguide region that includes a signal trace with a first width. The waveguide may further include a second waveguide region that includes the signal trace with a second width. The first width may be different from the second width. The signal trace may be configured to transmit an electrical signal. The signal trace with the second width may be configured to couple with an integrated circuit.
Opening claim text (preview).
What is claimed is: 1. A waveguide, comprising: a first waveguide region comprising a first portion of a signal trace disposed on a continuous surface of a single planar substrate, wherein the first portion comprises a first width; and a second waveguide region comprising a second portion of the signal trace disposed on the continuous surface of the single planar substrate, wherein the second portion comprises a second width, wherein the first width is different from the second width, wherein the signal trace is configured to transmit an electrical signal along a direction perpendicular to the first width and the second width, and wherein the signal trace with the second width is configured to couple with an integrated circuit, wherein the first waveguide region further comprises a first portion of the single planar substrate comprising a first thickness and a first ground plane disposed underneath the first portion and opposite the signal trace, wherein the second waveguide region further comprises a second portion of the single planar substrate comprising a second thickness and a second ground plane disposed underneath the second portion and opposite the signal trace, and wherein the first thickness exceeds the second thickness. 2. The waveguide of claim 1 , wherein the single planar substrate comprises a dielectric medium configured to contain electro-magnetic energy during transmission of the electrical signal through the signal trace, and wherein the dielectric medium is continuous throughout at least the first portion and the second portion of the single planar substrate. 3. The waveguide of claim 1 , further comprising: a transition region comprising a third portion of the signal trace and located between the first waveguide region and the second waveguide region. 4. The waveguide of claim 1 , further comprising: a third ground plane disposed on the continuous surface of the single planar substrate, wherein the signal trace is separated from the third ground plane by a substantially constant gap in the first waveguide region and the second waveguide region. 5. The waveguide of claim 4 , further comprising: a via connecting the third ground plane, the second ground plane, and the first ground plane, wherein the single planar substrate comprises a substantially constant thickness, and wherein the second ground plane is disposed on an internal layer surface in the single planar substrate. 6. The waveguide of claim 1 , wherein each of the first waveguide region and the second waveguide region is a grounded coplanar waveguide (GCWG). 7. A system for providing an electrical transmission line, comprising: a waveguide comprising a signal trace disposed on a continuous surface of a single planar substrate, a first waveguide region, and a second waveguide region, wherein the first waveguide region comprises a first portion of the signal trace with a first width, wherein the second waveguide region comprises a second portion of the signal trace with a second width, and wherein the first width is different from the second width; and an integrated circuit coupled to the signal trace with the second width, wherein the signal trace is configured to transmit, along a direction perpendicular to the first width and the second width, an electrical signal to the integrated circuit, wherein the first waveguide region further comprises a first portion of the single planar substrate comprising a first thickness and a first ground plane disposed underneath the first portion and opposite the signal trace, wherein the second waveguide region further comprises a second portion of the single planar substrate comprising a second thickness and a second ground plane disposed underneath the second portion and opposite the signal trace, and wherein the first thickness exceeds the second thickness. 8. The system of claim 7 , wherein the integrated circuit is coupled to the signal trace with the second width using a ball grid array having a plurality of solder pads, wherein the plurality of solder pads comprises a predetermined pitch size between a respective pair of the plurality of solder pads, wherein the signal trace with the second width substantially aligns with the predetermined pitch size, and wherein the second width and the predetermined pitch size substantially match each other and are perpendicular to the direction of transmitting the electrical signal. 9. The system of claim 7 , further comprising: wherein the waveguide comprises a transition region, wherein the transition region comprises a third portion of the signal trace and is located between the first waveguide region and the second waveguide region. 10. The system of claim 7 , further comprising: a third ground plane disposed on the continuous surface of the single planar substrate, wherein the signal trace is separated from the third ground plane by a substantially constant gap in the first waveguide region and the second waveguide region. 11. The system of claim 10 , further comprising: a via connecting the third ground plane, the second ground plane, and the first ground plane, wherein the single planar substrate comprises a substantially constant thickness, and wherein the second ground plane is disposed on an internal layer surface in the single planar substrate.
Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines · CPC title
Conductor backed coplanar waveguides · CPC title
between strip lines · CPC title
structurally associated with non-printed electric components (H05K1/16 takes precedence) · CPC title
by soldering · CPC title
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