Wideband antennas including a substrate integrated waveguide
US-9711860-B2 · Jul 18, 2017 · US
US9865935B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9865935-B2 |
| Application number | US-201514721195-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 26, 2015 |
| Priority date | Jan 12, 2015 |
| Publication date | Jan 9, 2018 |
| Grant date | Jan 9, 2018 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A Printed Circuit Board (PCB) comprising various integral components and method of manufacture are provided. The PCB includes a Substrate Integrated Waveguide (SIW), integrated waveguide antennas disposed above the SIW, apertures formed in SIW for coupling with the waveguide antennas, a transmission line routed above the SIW and using the SIW as a ground plane thereof, and further antennas, integrated into the PCB and disposed above and coupled to the transmission line. The SIW and the transmission line may be branched structures for feeding corresponding arrays of waveguide antennas and further antennas. Coplanar waveguides may also be integrated into the PCB and coupled to the SIW and the transmission line via integral impedance matching structures. PCB feature re-use and component interleaving may provide for a desirable and manufacturable PCB structure.
Opening claim text (preview).
We claim: 1. A Printed Circuit Board (PCB) comprising: a Substrate Integrated Waveguide (SIW) structure having a first conductive boundary disposed within a first conductive layer of the PCB, a second conductive boundary disposed within a second conductive layer of the PCB, and a plurality of first vias coupling the first conductive boundary to the second conductive boundary; at least one waveguide antenna disposed at least partially within further conductive layers of the PCB, the further conductive layers including a third conductive layer and a fourth conductive layer, wherein the second conductive layer is disposed between the first conductive layer and the third conductive layer, and wherein the third conductive layer is disposed between the second conductive layer and the fourth conductive layer; at least one aperture formed in the second conductive boundary of the SIW structure and aligned with the at least one waveguide antenna; a conductive trace of a transmission line, the conductive trace disposed within the third conductive layer, at least a portion of the conductive trace aligned overtop of the second conductive boundary of the SIW structure, the conductive trace routed around the at least one aperture; and at least one further antenna disposed at least partially within the fourth conductive layer and operatively coupled to the conductive trace. 2. The PCB according to claim 1 , wherein the SIW structure comprises a plurality of branches, each branch of the plurality of branches terminating at a respective location aligned with a corresponding one of a plurality of waveguide antennas including the at least one waveguide antenna, and wherein a plurality of apertures including the at least one aperture are formed in the second conductive boundary of the SIW structure and respectively aligned with the plurality of waveguide antennas. 3. The PCB according to claim 2 , wherein the transmission line comprises a further plurality of branches, each branch of the further plurality of branches terminating at a respective location aligned with a corresponding one of a plurality of further antennas including the at least one further antenna, the plurality of further antennas disposed at least partially within the fourth conductive layer and operatively coupled to the transmission structure. 4. The PCB according to claim 3 , wherein the plurality of waveguide antennas are disposed in a first two-dimensional array, and wherein the plurality of further antennas are disposed in a second two-dimensional array interleaved with the first two-dimensional array. 5. The PCB according to claim 1 , wherein the second conductive boundary of the SIW is integral with a ground plane disposed within the second conductive layer, said ground plane extending into a region of the second conductive layer surrounding the SIW structure. 6. The PCB according to claim 1 , wherein the transmission line is a stripline transmission line or a microstrip transmission line. 7. The PCB according to claim 1 , wherein the transmission line is a stripline transmission line formed from the conductive trace in cooperation a first ground plane and a second ground plane, the first ground plane disposed on the second conductive layer and comprising the second conductive boundary, the second ground plane disposed on the fourth conductive layer and interleaved with conductive elements of the at least one further antenna. 8. The PCB according to claim 1 , wherein the waveguide antenna comprises a pair of aligned, closed conductive traces formed respectively on the third conductive layer and the fourth conductive layer and a plurality of vias connecting the closed conductive traces, the closed conductive traces and the plurality of vias defining a perimeter of a non-conductive region of the waveguide antenna. 9. The PCB according to claim 1 , wherein the further antenna is a patch antenna having a conductive body which is laterally offset from the at least one waveguide antenna. 10. The PCB according to claim 1 , wherein the further antenna has a conductive body which defines a perimeter of a cavity in the plane of the fourth conductive layer, and wherein the waveguide antenna is at least partially disposed within the cavity. 11. The PCB according to claim 10 , wherein the conductive body of the patch antenna is a C-shaped body. 12. The PCB according to claim 1 , wherein some of the first vias include portions extending to and integral with conductive portions of the waveguide antenna. 13. The PCB according to claim 1 , further comprising a Coplanar Waveguide (CPWG) structure disposed on the first conductive layer and operatively coupled to the SIW structure through an impedance matching structure disposed at an interface between a port of the CPWG structure and a port of the SIW structure, the impedance matching structure at least partially disposed on the first conductive layer. 14. The PCB according to claim 13 , wherein the CPWG structure comprises a central conductive trace disposed between a first pair of elongated dielectric regions having a first width, wherein the impedance matching structure comprises an extension of the central conductive trace surrounded by a second pair of dielectric regions aligned with the first pair of dielectric regions and having a second width greater than the first width, and wherein the central conductive trace of the CPWG structure is conductively coupled to the first conductive boundary of the SIW at the port of the SIW structure. 15. The PCB according to claim 1 , further comprising a Coplanar Waveguide (CPWG) structure disposed on the first conductive layer or the fourth conductive layer and operatively coupled to the transmission line using a via, the via connecting the conductive trace of the transmission line with a central conductive trace of the CPWG structure. 16. The PCB according to claim 1 , wherein the second conductive layer and the third conductive layer are separated by a dielectric layer having a thickness between 4 mil and 12 mil. 17. The PCB according to claim 1 , further comprising at least a partial via fence formed between the second conductive and the third conductive layer and at least partially surrounding the at least one aperture. 18. A method of manufacturing a PCB, the method comprising: forming a Substrate Integrated Waveguide (SIW) structure having a first conductive boundary disposed within a first conductive layer of the PCB, a second conductive boundary disposed within a second conductive layer of the PCB, and a plurality of first vias coupling the first conductive boundary to the second conductive boundary; forming at least one aperture in the second conductive boundary of the SIW structure and aligned with the at least one waveguide antenna; forming at least one waveguide antenna disposed at least partially within further conductive layers of the PCB, the further conductive layers including a third conductive layer and a fourth conductive layer, wherein the second conductive layer is disposed between the first conductive layer and the third conductive layer, and wherein the third conductive layer is disposed between the second conductive layer and the fourth conductive layer; forming a conductive trace of a transmission line, the conductive trace disposed within the third conductive layer, at least a portion of the conductive trace aligned overtop of the second conductive boundary of the SIW structure thereby facilitating operation of the transmission line, the conductive trace routed around the at least one aperture; and forming at le
Patch antenna array · CPC title
specially adapted for base stations · CPC title
Slotted waveguides arrays · CPC title
with built-in antennas · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.