Techniques for accessing a graphical processing unit memory by an application

Patent metadata

Field	Value
Publication number	US-9864638-B2
Application number	US-201213530250-A
Country	US
Kind code	B2
Filing date	Jun 22, 2012
Priority date	Jun 22, 2012
Publication date	Jan 9, 2018
Grant date	Jan 9, 2018

Abstract

Various embodiments are presented herein that may allow an application direct access to graphical processing unit memory. An apparatus and a computer-implemented method may include accessing allocated graphical processing unit memory of a second resource via a link from a first resource. The allocated graphical processing unit memory may be mapped into one or more page tables of a central processing unit. A virtual address of the graphical processing unit memory from the one or more page tables of the central processing unit may be sent to the application.

First claim

What is claimed is:

1. A computer-implemented method, comprising:
aborting an allocation of graphical processing unit memory for a first resource;
accessing, from a central processing unit, allocated graphical processing unit memory of a second resource via a link from the first resource;
mapping the allocated graphical processing unit memory into one or more page tables of the central processing unit to follow the link;
sending a virtual address of the graphical processing unit memory from the one or more page tables of the central processing unit to an application executed by the central processing unit; and
creating the first and second resource to allow the application direct access to the graphical processing unit memory via one or more application programming interfaces, the first and second resources comprising data structures.

2. The computer-implemented method of claim 1 , comprising:
allocating the graphical processing unit memory for the second resource.

3. The computer-implemented method of claim 1 , comprising:
receiving a request for the application to have direct access to the graphical processing unit memory.

4. The computer-implemented method of claim 1 , the first resource comprising a staging resource and the second resource comprising a non-staging resource.

5. The computer-implemented method of claim 1 , comprising:
designating the first and second resources as shared resources.

6. The computer-implemented method of claim 1 , comprising:
storing, in a data structure of the first resource, a pointer to a data structure of the second resource to create the link.

7. The computer-implemented method of claim 1 , comprising:
receiving the virtual address of the graphical processing unit memory from the one or more page tables of the central processing unit.

8. The computer-implemented method of claim 1 , comprising:
determining whether to flush a cache of the graphical processing unit memory based on one of a read and write flag; and
determining whether to invalidate a cache of the graphical processing unit memory based on one of a read and write flag.

9. An apparatus comprising:
a central processing unit, and
a graphics driver operative on the central processing unit to allow an application executed by the central processing unit direct access to a graphical processing unit memory, and the graphics driver operative to implement one or more application programming interfaces comprising:
a create resource application programming interface to designate a first resource and a second resource as shared resources, abort an allocation of graphical processing unit memory for the first resource, and allocate the graphical processing unit memory for the second resource;
a resource copy application programming interface to create a pointer in the first resource to the second resource when the first and second resources are shared resources; and
a map staging resource application programming interface to follow the pointer from the first resource to the allocated graphical processing unit memory of the second resource, map the allocated graphical processing unit memory of the second resource into one or more page tables of the central processing unit, and send a virtual address of the graphical processing unit memory from the one or more page tables of the central processing unit to the application.

10. The apparatus of claim 9 , the graphics driver operative to implement the create resource application programming interface to determine whether initialization data for the second resource was specially formatted.

11. The apparatus of claim 9 , the graphics driver operative to implement the create resource application programming interface to determine whether initialization data for the first resource was specially formatted.

12. The apparatus of claim 9 , the graphics driver operative to implement the resource copy application programming interface to store, in a data structure of the first resource, the pointer to a data structure of the second resource.

13. The apparatus of claim 9 , the graphics driver operative to implement the map staging resource application programming interface to receive a virtual pointer with the virtual address from one or more central processing unit page tables.

14. The apparatus of claim 9 , the graphics driver operative to implement the map staging resource application programming interface to send a virtual pointer with the virtual address to the application.

15. The apparatus of claim 9 , the graphics driver operative to implement the map staging resource application programming interface to determine whether to flush a cache of the graphical processing unit memory based on a flag.

16. The apparatus of claim 9 , the graphics driver operative to implement the map staging resource application programming interface to determine whether to invalidate a cache of the graphical processing unit memory based on a flag.

17. The apparatus of claim 9 , the first resource comprises a staging resource and the second resource comprises a non-staging resource.

18. The apparatus of claim 9 , comprising:
a digital display operatively coupled to the central processing unit.

19. At least one non-transitory machine readable medium comprising a plurality of instructions that in response to being executed on a computing device cause the computing device to:
aborting an allocation of graphical processing unit memory for a first resource;
access, from a central processing unit, allocated graphical processing unit memory of a second resource via a link from the first resource;
map the allocated graphical processing unit memory into one or more page tables of the central processing unit to follow the link;
send a virtual address of the graphical processing unit memory from the one or more page tables of the central processing unit to an application executed by the central processing unit; and
create the first and second resource to allow the application direct access to the graphical processing unit memory via one or more application programming interfaces, the first and second resources comprising data structures.

20. The least one non-transitory machine readable medium of claim 19 , comprising a plurality of instructions that in response to being executed on a computing device cause the computing device to receive a request for an application to have direct access to the graphical processing unit memory.

21. The least one non-transitory machine readable medium of claim 19 , comprising a plurality of instructions that in response to being executed on a computing device cause the computing device to store, in a data structure of the first resource, a pointer to a data structure of the second resource to create a link between the first resource and the second resource.

22. The least one non-transitory machine readable medium of claim 19 , comprising a plurality of instructions that in response to being executed on a computing device cause the computing device to receive the virtual address of the graphical processing unit memory from the one or more page tables of the central processing unit.

23. A system comprising:
a central processing unit;
a digital display operatively coupled to the central processing unit; and
a graphics driver operative on the central processing unit to allow an application direct access to a graphical processing unit memory, and the graphics driver operative to implement one or more appli

Assignees

• Apodaca Michael
• Intel Corp

Inventors

• Apodaca Michael

Classifications

• G06F9/5044

  considering hardware capabilities · CPC title

• G06F9/5016 Primary

  the resource being the memory · CPC title

• G09G5/39

  Control of the bit-mapped memory · CPC title

• G06F12/1009

  using page tables, e.g. page table structures · CPC title

• Y02B60/142

  Cross-Sectional Technologies · mapped topic