Active matrix display device
US-9460679-B2 · Oct 4, 2016 · US
Control of the bit-mapped memory
Control of the bit-mapped memory · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G09G5/39 |
| Official title | Control of the bit-mapped memory |
| Display label | Control of the bit-mapped memory |
| Total patents | 431 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 56 |
| 2016 | 65 |
| 2017 | 67 |
| 2018 | 46 |
| 2019 | 43 |
| 2020 | 48 |
| 2021 | 28 |
| 2022 | 29 |
| 2023 | 21 |
| 2024 | 13 |
| 2025 | 14 |
| 2026 | 1 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Method, apparatus, computer and mobile device for display and vehicle having the apparatus
US-9383961-B2 · Jul 5, 2016 · US
Microprocessor including a display interface in the microprocessor
US-9336752-B1 · May 10, 2016 · US
Display driver integrated circuit including first-in-first-out (FIFO) memories configured to receive display data from a distributor and output the display data to graphics memories a display system having the same, and a display data processing method thereof
US-9240165-B2 · Jan 19, 2016 · US
Active matrix display device
US-9208743-B2 · Dec 8, 2015 · US
Display of a forgery-proof indicator
US-2015348515-A1 · Dec 3, 2015 · US
Display device
US-2015340015-A1 · Nov 26, 2015 · US
Buffer clearing apparatus and method for computer graphics
US-9196014-B2 · Nov 24, 2015 · US
Data generator and display driver including the same
US-2015325217-A1 · Nov 12, 2015 · US
Semiconductor device and data processing system selectively operating as one of a big endian or little endian system
US-2015324225-A1 · Nov 12, 2015 · US
Frame buffer power management
US-2015323982-A1 · Nov 12, 2015 · US
Automated measurement of differential latency between displays
US-2015317926-A1 · Nov 5, 2015 · US
Display device
US-9171492-B2 · Oct 27, 2015 · US
Method for pixel gradation extension, drive method and apparatus for charging time of pixel capacitance
US-9165522-B2 · Oct 20, 2015 · US
Display controller and display device including the same
US-9164884-B2 · Oct 20, 2015 · US
Method and system for tracking accesses to virtual addresses in graphics contexts
US-9153211-B1 · Oct 6, 2015 · US
Image decoder, graphics processor, image decoding method, and graphics processing method
US-2015262385-A1 · Sep 17, 2015 · US
Display Pipe Statistics Calculation for Video Encoder
US-2015255047-A1 · Sep 10, 2015 · US
Graphics display processing device, graphics display processing method, and vehicle equipped with graphics display processing device
US-2015248742-A1 · Sep 3, 2015 · US
Method and apparatus for transferring data in a computer
US-2015243259-A1 · Aug 27, 2015 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G09G5/39?
- CPC G09G5/39 is the Cooperative Patent Classification code for “Control of the bit-mapped memory.”
- How many patents are filed under CPC G09G5/39 (Control of the bit-mapped memory)?
- Our database includes 431 publications tagged with this CPC code.
- Is patent activity under CPC G09G5/39 growing?
- Publication counts under this code: 13 in 2024 vs 14 in 2025 (latest complete years).