Zone selective interlocking test apparatus

US9864009B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9864009-B1
Application numberUS-201615183317-A
CountryUS
Kind codeB1
Filing dateJun 15, 2016
Priority dateJun 15, 2016
Publication dateJan 9, 2018
Grant dateJan 9, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A ZSI testing apparatus includes a fault generation circuit, a plurality of cable assemblies coupled to the fault generation circuit, wherein the cable assemblies are structured to be selectively coupled to selected circuit interrupters, a human machine interface, and a controller coupled. The controller is configured to: (i) selectively cause a fault current to be provided to a number of the cable assemblies, (ii) receive an input from each circuit interrupter that is coupled to one of the cable assemblies, each input being indicative of a trip signal output of the circuit interrupter, (iii) determine based on the received inputs (a) that an error has occurred with respect to operation of the circuit interrupters and (b) a recommendation for fixing the error, and (iv) cause an output indicative of the error and the recommendation to be provided on the human machine interface.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus for testing the zone selective interlocking functionality of an electrical system including a plurality of circuit interrupters, comprising: a fault generation circuit structured to generate a fault current; a plurality of cable assemblies coupled to the fault generation circuit, wherein the cable assemblies are structured to be selectively coupled to selected ones of the circuit interrupters; a human machine interface; and a controller coupled to the fault generation circuit and to the plurality of cable assemblies, the controller being structured and configured to: (i) selectively cause the fault current to be provided to a number of the cable assemblies so that the fault current can in turn be provided to the circuit interrupter coupled to each of the number of the cable assemblies, (ii) receive an input from each circuit interrupter that is coupled to one of the cable assemblies, each input being indicative of a trip signal output of the circuit interrupter, (iii) determine based on the received inputs (a) that an error has occurred with respect to operation of the circuit interrupters and (b) a recommendation for fixing the error, and (iv) cause an output indicative of the error and the recommendation to be provided on the human machine interface. 2. The apparatus according to claim 1 , wherein the cable assemblies are structured to be selectively coupled to selected ones of the circuit interrupters according to a plurality of predetermined configurations, wherein for each of the predetermined configurations two or more of the cable assemblies are coupled to particular ones of circuit interrupters, wherein the controller is structured and configured to, for each of the predetermined configurations, selectively cause a plurality of fault test types to be performed, and wherein for each of the predetermined configurations and each of the fault test types associated therewith, the controller is structured and configured to cause the fault current to be provided to predetermined ones of the cable assemblies. 3. The apparatus according to claim 2 , wherein the controller stores, for each predetermined configuration and each associated fault test type, trip information that indicates for each circuit interrupter in the predetermined configuration: (i) whether the circuit interrupter should have tripped, and (ii) if the circuit interrupter should have tripped, a predetermined time from receipt of the fault current within which the circuit interrupter should have tripped. 4. The apparatus according to claim 3 , wherein the controller is structured and configured to determine that the error has occurred based on the received inputs and the stored trip information. 5. The apparatus according to claim 4 , wherein the test fault types include a main fault, a tie fault, a feeder fault, and a simultaneous main fault. 6. The apparatus according to claim 3 , wherein a first one or more of the predetermined configurations are for use with a single ended arrangement and a second one or more of the predetermined configurations are for use with a double ended arrangement, and wherein the controller is structured and configured to enable selection of testing for either a double ended arrangement or a single ended arrangement. 7. The apparatus according to claim 1 , wherein the controller is structured and configured to cause the output indicative of the error and the recommendation to be visually displayed on a display of the human machine interface. 8. A method for testing the zone selective interlocking functionality of an electrical system including a plurality of circuit interrupters, comprising: coupling a plurality of cable assemblies to selected ones of the circuit interrupters; generating a fault current; providing the fault current to a number of the cable assemblies and in turn to the circuit interrupter coupled to each of the number of the cable assemblies; receiving an input from each circuit interrupter that is coupled to one of the cable assemblies, each input being indicative of a trip signal output of the circuit interrupter; determining based on the received inputs (i) that an error has occurred with respect to operation of the circuit interrupters and (ii) a recommendation for fixing the error; and providing an output indicative of the error and the recommendation. 9. The method according to claim 8 , wherein the providing an output comprises visually displaying the output on human machine interface. 10. The method according to claim 8 , wherein the plurality of cable assemblies are connected to the selected ones of the circuit interrupters according to a predetermined configuration, the method further comprising receiving information relating to a type of arrangement being tested and a type of fault test to be conducted and determining which of the number of cable assemblies receives the fault current based on the predetermined configuration, the type of arrangement, and the type of fault test. 11. The method according to claim 10 , wherein the determining that the error has occurred and the determining the recommendation are based on the predetermined configuration, the type of arrangement, the type of fault test and stored trip information that indicates for each circuit interrupter in the predetermined configuration: (i) whether the circuit interrupter should have tripped, and (ii) if the circuit interrupter should have tripped, a predetermined time from receipt of the fault current within which the circuit interrupter should have tripped. 12. The method according to claim 10 , wherein the type of fault test is one or more of a main fault, a tie fault, a feeder fault, and a simultaneous main fault.

Assignees

Inventors

Classifications

  • Fault detection or status indication · CPC title

  • involving signal transmission between at least two stations (transmission of signals in general H02H1/0061) · CPC title

  • Details related to measuring, e.g. sensing, displaying or computing; Measuring of variables related to the contact pieces, e.g. wear, position or resistance (measuring contact resistance G01R27/205) · CPC title

  • involving comparison of the voltage or current values at corresponding points in different conductors of a single system, e.g. of currents in go and return conductors · CPC title

  • Staggered disconnection · CPC title

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Frequently asked questions

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What does patent US9864009B1 cover?
A ZSI testing apparatus includes a fault generation circuit, a plurality of cable assemblies coupled to the fault generation circuit, wherein the cable assemblies are structured to be selectively coupled to selected circuit interrupters, a human machine interface, and a controller coupled. The controller is configured to: (i) selectively cause a fault current to be provided to a number of the c…
Who is the assignee on this patent?
Eaton Corp
What technology area does this patent fall under?
Primary CPC classification G01R31/3275. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 09 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).