Harmonics suppression filter

Patent metadata

Field	Value
Publication number	US-9859601-B2
Application number	US-201514681786-A
Country	US
Kind code	B2
Filing date	Apr 8, 2015
Priority date	Sep 9, 2014
Publication date	Jan 2, 2018
Grant date	Jan 2, 2018

Abstract

A harmonics suppression filter includes a main circuit, a first inner circuit, a first outer circuit, a first inner node and a first outer node. The first inner circuit, the first outer circuit and the main circuit are in the same layer of the base board. Meanwhile, the first inner circuit is located inside of the main circuit. There is an inner gap between the first inner circuit and the main circuit. The first outer circuit is located outside of the main circuit. There is an outer gap between the first outer circuit and the main circuit. The first inner node is located in the inner gap to couple the first inner circuit with the main circuit. The first outer node is located in the outer gap to couple the first outer circuit with the main circuit.

First claim

What is claimed is:

1. A harmonics suppression filter located in a base board for suppressing harmonics, the harmonics suppression filter comprising:
a first signal port;
a second signal port;
a main circuit, located in a first layer of the base board, the main circuit comprising a first end coupled to the first signal port and a second end coupled to the second signal port;
a first inner circuit, located in the first layer of the base board, and located inside of the main circuit, wherein the first inner circuit and the main circuit collectively define an inner gap;
a first outer circuit, located in the first layer of the base board, and located outside of the main circuit, wherein the first outer circuit and the main circuit collectively define an outer gap;
a first inner node, located in the inner gap and coupled with the main circuit and the first inner circuit;
a first outer node, located in the outer gap and coupled with the main circuit and the first outer circuit; and
wherein the first signal port, the main circuit, and the second signal port are coupled in series to form a loop; the first inner circuit is directly connected to the main circuit via only the first inner node to form a main circuit first branch; the first outer circuit is directly connected to the main circuit via only the first outer node to form a main circuit second branch.

2. The harmonics suppression filter as claimed in claim 1 , further comprising:
at least a second inner circuit, located in a second layer of the base board different from the first layer; and
at least a second inner node, coupled to the second inner circuit in the second layer.

3. The harmonics suppression filter as claimed in claim 2 , wherein the first inner node is coupled to the at least one second inner node through a via.

4. The harmonics suppression filter as claimed in claim 2 , wherein the first inner circuit and the second inner circuit are both spiral-shaped.

5. The harmonics suppression filter as claimed in claim 1 , further comprising:
at least one second outer circuit, located in a second layer of the base board different from the first layer; and
at least one second outer node, coupled to the second outer circuit in the second layer of the base board.

6. The harmonics suppression filter as claimed in claim 5 , wherein the first outer node is coupled to the at least one second outer node through a via.

7. The harmonics suppression filter as claimed in claim 5 , wherein the first outer circuit and the second outer circuit are both spiral-shaped.

8. The harmonics suppression filter as claimed in claim 1 , wherein the main circuit is spiral-shaped, the first signal port and the second signal port are both strip-shaped.

9. A stack harmonics suppression filter located in a base board for suppressing harmonics, comprising:
at least two harmonics suppression filters each comprising:
a first signal port;
a second signal port;
a main circuit, located in a first layer of the base board with a first end coupled to the first signal port, and a second end coupled to the second signal port;
a first inner circuit, located in the first layer of the base board with the main circuit, and located inside of the main circuit, wherein the first inner circuit and the main circuit collectively define an inner gap;
a first outer circuit, located in the first layer of the base board with the main circuit, and located outside of the main circuit, wherein the first outer circuit and the main circuit collectively define an outer gap;
a first inner node, located in the inner gap and coupled with the main circuit and the first inner circuit; and
a first outer node, located in the outer gap and coupled with the main circuit and the first outer circuit;
wherein the at least two harmonics suppression filters are located in different layers of the base board and are coupled together via the first signal port or the second signal port.

10. The stack harmonics suppression filter as claimed in claim 9 , wherein each of the at least two harmonics suppression filters further comprises:
at least one second inner circuit, located in different layers of the base board with the main circuit; and
at least one second inner node, coupled to the second inner circuit in the same layer of the second inner node.

11. The stack harmonics suppression filter as claimed in claim 10 , wherein the first inner node is coupled to the at least one second inner node through a via.

12. The stack harmonics suppression filter as claimed in claim 10 , wherein the first inner circuit and the second inner circuit are spiral-shaped.

13. The stack harmonics suppression filter as claimed in claim 9 , wherein each of the at least two harmonics suppression filters further comprises:
at least one second outer circuit, located in a second layer of the base board with the main circuit; and
at least one second outer node, coupled to the second outer circuit in the same layer of the second outer node.

14. The stack harmonics suppression filter as claimed in claim 13 , wherein the first outer node is coupled to the at least one second outer node through a via.

15. The stack harmonics suppression filter as claimed in claim 13 , wherein the first outer circuit and the second outer circuit are both spiral-shaped.

16. The stack harmonics suppression filter as claimed in claim 9 , wherein the main circuit is spiral-shaped, the first signal port and the second signal port are both strip-shaped.

17. The stack harmonics suppression filter as claimed in claim 9 , wherein parts of the first signal ports of the at least two harmonics suppression filters are coupled together through vias, or parts of the second signal ports of the at least two harmonics suppression filters are coupled together through vias.

Assignees

• Hon Hai Prec Ind Co Ltd

Inventors

• Chen Chen-Hsiang

Classifications

• H03H7/09

  Filters comprising mutual inductance · CPC title

• H01P1/2039

  Galvanic coupling between Input/Output · CPC title

• H01P1/203

  Strip line filters · CPC title

• H01P1/20381

  Special shape resonators · CPC title

• H01P1/212 Primary

  suppressing or attenuating harmonic frequencies (H01P1/215 takes precedence) · CPC title