Multilayer resin substrate, and method of manufacturing multilayer resin substrate

Patent metadata

Field	Value
Publication number	US-9848489-B2
Application number	US-201514879296-A
Country	US
Kind code	B2
Filing date	Oct 9, 2015
Priority date	Jul 11, 2013
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

A multilayer resin substrate includes resin substrates laminated together, an overlapping portion in which a signal line as a conductor pattern and another conductor pattern overlap each other in a laminating direction of the resin substrates, and a non-overlapping portion in which the signal line and the other conductor pattern do no overlap each other in the laminating direction. A thin portion is provided at a position in the non-overlapping portion near the overlapping portion. The thin portion is a portion of the multilayer resin substrate which has a thickness smaller than the thickness in the overlapping portion in the laminating direction of the resin substrates.

First claim

What is claimed is:

1. A multilayer resin substrate comprising:
a plurality of resin substrates that are laminated together;
an overlapping portion in which a signal line that is provided as a conductor pattern and another conductor pattern overlap each other in a laminating direction of the plurality of resin substrates;
a non-overlapping portion in which the signal line and the another conductor pattern do not overlap each other in the laminating direction of the plurality of resin substrates; and
a thin portion that is provided in the non-overlapping portion near the overlapping portion, the thin portion being a portion of the multilayer resin substrate which has a thickness smaller than a thickness of the plurality of resin substrates in the overlapping portion in the laminating direction of the plurality of resin substrates; wherein
the thin portion, in plan view in the laminating direction of the plurality of resin substrates, does not overlap the overlapping portion, and is defined by a plurality of recesses disposed along a direction in which the signal line extends or is defined by a plurality of recesses that extend continuously in the direction in which the signal line extends;
the thin portion is provided in only the plurality of resin substrates; and
the plurality of recesses are provided in a top resin substrate and a bottom resin substrate of the plurality of resin substrates.

2. The multilayer resin substrate according to claim 1 , wherein the another conductor pattern is a ground pattern, another signal line, or a capacitance pattern.

3. The multilayer resin substrate according to claim 1 , wherein in the plan view, the thin portion is located between a plurality of signal lines.

4. The multilayer resin substrate according to claim 1 , wherein each of the plurality of resin substrates includes a resin sheet that has high flexibility.

5. The multilayer resin substrate according to claim 1 , wherein each of the plurality of resin substrates includes a resin sheet that has thermal plasticity.

6. The multilayer resin substrate according to claim 1 , wherein the plurality of resin substrates include three resin substrates.

7. The multilayer resin substrate according to claim 1 , wherein the plurality of recesses are provided in two of the plurality of resin substrates so as to oppose each other with another one of the plurality of resin substrates located therebetween.

8. The multilayer resin substrate according to claim 7 , wherein the plurality of recesses do not overlap the signal line.

Assignees

• Murata Manufacturing Co

Inventors

• Shinagawa Hirofumi
• Tago Shigeru

Classifications

• H05K2203/063

  of preperforated insulating layer · CPC title

• H05K1/024

  Dielectric details, e.g. changing the dielectric material around a transmission line · CPC title

• H05K3/4635

  laminating flexible circuit boards using additional insulating adhesive materials between the boards · CPC title

• H05K1/115

  Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

• H05K1/0216

  Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215) · CPC title