Reconfiguration of single-band transmit and receive paths to multi-band transmit and receive paths in an integrated circuit

Patent metadata

Field	Value
Publication number	US-9847802-B1
Application number	US-201615238537-A
Country	US
Kind code	B1
Filing date	Aug 16, 2016
Priority date	Aug 16, 2016
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

An example transmitter includes first and second circuit stages and interface circuits. The first circuit stage is configured to generate modulated signals each having a different carrier frequency from baseband signals. The second circuit stage is configured to generate radio frequency (RF) energy to be radiated by antenna(s). The interface circuits are coupled between the first circuit stage and the second circuit stage. The second circuit stage and the interface circuits are configurable to provide a first mode and a second mode. In the first mode, the second circuit stage provides transmit paths and the interface circuits couple each of the modulated signals to a respective one of the transmit paths. In the second mode, the second circuit stage provides a first transmit path and the interface circuits couple a sum of at least two of the modulated signals to the first transmit path.

First claim

What is claimed is:

1. A transmitter, comprising:
a first circuit stage configured to generate modulated signals from baseband signals, each of the modulated signals comprising a digital signal having respective a carrier frequency of a plurality of carrier frequencies;
a second circuit stage configured to generate radio frequency (RF) energy to be radiated by one or more antennas; and
interface circuits coupled between the first circuit stage and the second circuit stage; and
a controller that configures a mode of the second circuit stage and the interface circuits selected from a first mode and a second mode, where:
in the first mode, the second circuit stage provides a plurality of transmit paths and the interface circuits couple each of the modulated signals to a respective one of the plurality of transmit paths, wherein, in the first mode, each of the plurality of carrier frequencies comprises an RF frequency and each of the plurality of transmit paths includes a digital-to-analog converter (DAC) and a power amplifier (PA); and
in the second mode, the second circuit stage provides a first transmit path and the interface circuits couple a sum of at least two of the modulated signals to the first transmit path.

2. The transmitter of claim 1 , wherein, in the second mode, the second circuit stage provides a second transmit path and the interface circuits couple another sum of another at least two of the modulated signals to the second transmit path.

3. The transmitter of claim 1 , wherein, in the second mode, the carrier frequencies of the at least two modulated signals comprise RF frequencies and the first transmit path includes a digital-to-analog converter (DAC) and a power amplifier (PA).

4. The transmitter of claim 1 , wherein, in the second mode, the carrier frequencies of the at least two modulated signals comprise intermediate frequency (IF) frequencies and the first transmit path includes a digital-to-analog converter (DAC), an analog modulator, and a power amplifier (PA).

5. The transmitter of claim 1 , wherein, in the second mode:
the at least two modulated signals comprise a first in-phase modulated signal having a first intermediate frequency (IF) and a second in-phase modulated signal having a second IF frequency; and
the second circuit stage provides a second transmit path and the interface circuits couple a sum of a first quadrature modulated signal and a second quadrature modulated signal to the second transmit path, the first quadrature modulated signal having the first IF frequency and the second quadrature modulated signal having the second IF frequency.

6. The transmitter of claim 5 , wherein the first transmit path comprises a first digital-to-analog converter (DAC), an analog modulator, and a power amplifier (PA), and the second transmit path comprises a second DAC, the analog modulator, and the PA.

7. The transmitter of claim 1 , wherein the first circuit stage comprises:
interpolators configured increase the sampling-rate of the baseband signals; and
digital modulators, coupled to the interpolators, configured to generate the modulated signals from the baseband signals.

8. The transmitter of claim 7 , wherein the first circuit stage further comprises:
numerically controlled oscillators (NCOs), coupled to the digital modulators, configured to provide digital carrier signals for modulation by the baseband signals to generate the modulated signals.

9. The transmitter of claim 1 , wherein the baseband signals comprise in-phase baseband signals and quadrature baseband signals, and wherein each of the modulated signals is a sum of an in-phase digital carrier signal modulated by one of the in-phase baseband signals and a quadrature digital carrier signal modulated by one of the quadrature baseband signals.

10. A receiver, comprising:
a first circuit stage configured to receive radio frequency (RF) energy from one or more antennas;
a second circuit stage having a plurality of demodulation paths each comprising a digital demodulator configured to process a respective frequency of a plurality of frequencies; and
interface circuits coupled between the first circuit stage and the second circuit stage; and
a controller that configures a mode of the second circuit stage and the interface circuits selected from a first mode and a second mode, where;
in the first mode, the first circuit stage generates a plurality of digital signals from the RF energy and the interface circuits couple each of the plurality of digital signals to a respective one of the plurality of demodulation paths; and
in the second mode, the first circuit stage generates a first digital signal from the RF energy and the interface circuits couple the first digital signal to at least two of the plurality of demodulation paths.

11. The receiver of claim 10 , wherein, in the second mode, the first circuit stage generates a second digital signal from the RF energy and the interface circuits couple the second digital signal to at least two other of the plurality of demodulation paths.

12. The receiver of claim 10 , wherein, in the second mode, the first circuit stage generates a second digital signal from the RF energy and the interface circuits couple the second digital signal to the at least two demodulation paths receiving the first digital signal.

13. The receiver of claim 12 , wherein, in the second mode:
the at least two demodulation paths comprise a first demodulation path having a first digital demodulator and a second demodulation path having a second digital demodulator;
the first digital demodulator processes a first frequency of the plurality of frequencies and the second digital demodulator processes a second frequency of the plurality of frequencies; and
each of the first and second digital demodulators include in-phase (I) and quadrature (Q) inputs configured to receive the first digital signal and the second digital signal, respectively.

14. The receiver of claim 13 , wherein the first frequency is a first intermediate frequency (IF) frequency and the second frequency is a second IF frequency and wherein, in the second mode, the first circuit stage provides:
a first receive path configured to generate an in-phase IF signal from the RF energy and the first digital signal from the in-phase IF signal; and
a second receive path configured to generate a quadrature IF signal from the RF energy and the second digital signal from the quadrature IF signal.

15. The receiver of claim 14 , wherein the first receive path includes a low-noise amplifier (LNA), an analog demodulator, and a first analog-to-digital converter (ADC), and wherein the second receive path includes the LNA, the analog demodulator, and a second ADC.

16. The receiver of claim 10 , wherein, in the first mode:
the plurality of demodulation paths comprises a first demodulation path having a first digital demodulator;
the first digital demodulator processes a first frequency of the plurality of frequencies;
the first digital demodulator includes in-phase (I) and quadrature (Q) inputs; and
in the first mode, the interface circuits couple one of the plurality of digital signals to both of the I and Q inputs of the first digital demodulator.

17. The receiver of claim 10 , wherein the first frequency is a first RF frequency and wherein, in the first mode, the first circuit stage provides a first receive path configured to generate the one of the plurality of digital signals from the RF energy.

18. The receiver of claim 17 , wherein the first receive path includes a low-noise amplifier (

Assignees

• Xilinx Inc

Inventors

• Farley Brendan
• Mcgrath John E

Classifications

• H04B1/0483 Primary

  Transmitters with multiple parallel paths · CPC title

• H04B1/406 Primary

  with more than one transmission mode, e.g. analog and digital modes · CPC title

• H04B1/005 Primary

  adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges · CPC title

• H04B1/16

  Circuits · CPC title