Self-regulated reference for switched capacitor circuit

US9847763B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9847763-B2
Application numberUS-201615166066-A
CountryUS
Kind codeB2
Filing dateMay 26, 2016
Priority dateSep 15, 2015
Publication dateDec 19, 2017
Grant dateDec 19, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A switched-capacitor circuit comprising a differential operational amplifier and a feedback circuit is described. In some embodiments, the feedback circuit may be configured to provide a reference voltage that is insensitive to temperature and/or process variations. In some embodiments, the feedback circuit may be configured to mitigate the time delay associated with one or more capacitors of the switched-capacitor circuit. The switched-capacitor circuit may be controlled by a pair of control signals. During a first phase, one or more capacitors may be charged, or discharged, through an input signal. During a second phase, the electric charge of the one or more capacitors may be retained.

First claim

Opening claim text (preview).

What is claimed is: 1. A switched-capacitor circuit, comprising: a differential operational amplifier; at least one capacitor coupled to an input of the differential operational amplifier; and a feedback circuit coupled to the input of the differential operational amplifier and an input of the switched-capacitor circuit, the feedback circuit being configured to receive a reference signal and to produce, based at least in part on the reference signal, at least one stabilized reference signal, wherein the feedback circuit comprises a flipped voltage follower and wherein the flipped voltage follower comprises an input connected to an output of a common source amplifier. 2. The switched capacitor circuit of claim 1 , wherein the feedback circuit comprises a common source amplifier. 3. The switched-capacitor circuit of claim 2 , wherein the common source amplifier exhibits a gain configured to cancel, at least in part, a capacitance of the at least one capacitor. 4. The switched capacitor circuit of claim 2 , wherein the common source amplifier is connected to an active load. 5. The switched capacitor circuit of claim 2 , wherein the common source amplifier comprises a differential amplifier. 6. The switched capacitor circuit of claim 1 , wherein the feedback circuit comprises a replica bias circuit. 7. A switched-capacitor circuit, comprising: a differential operational amplifier; and at least one capacitor coupled to an input of the differential operational amplifier; and a feedback circuit coupled to the input of the differential operational amplifier and an input of the switched-capacitor circuit, wherein the feedback circuit exhibits a gain configured to cancel, at least in part, a capacitance of the at least one capacitor, and wherein the feedback circuit comprises a flipped voltage follower circuit and wherein the flipped voltage follower comprises an input connected to an output of a common source amplifier. 8. The switched-capacitor circuit of claim 7 , wherein the differential operational amplifier exhibits a feedback factor that is independent of the at least one capacitor. 9. The switched capacitor circuit of claim 7 , wherein the feedback circuit comprises the common source amplifier. 10. The switched capacitor circuit of claim 9 , wherein the common source amplifier is connected to an active load. 11. The switched capacitor circuit of claim 9 , wherein the common source amplifier comprises a differential amplifier. 12. The switched capacitor circuit of claim 7 , wherein the feedback circuit comprises a replica bias circuit. 13. A switched-capacitor circuit, comprising: a differential operational amplifier; a first and a second capacitor, the first capacitor being coupled to an input of the differential operational amplifier; a first feedback circuit coupled to an output of the second capacitor, the input of the differential operational amplifier, and an input of the switched-capacitor circuit, the first feedback circuit being configured to receive a reference signal and to produce, based at least in part on the reference signal, at least one stabilized reference signal; and a second feedback circuit coupled to an output of the first capacitor and an input of the second capacitor. 14. The switched-capacitor circuit of claim 13 , wherein the first feedback circuit comprises a common source amplifier. 15. The switched-capacitor circuit of claim 13 , wherein the first feedback circuit comprises a flipped voltage follower. 16. A switched-capacitor circuit, comprising: a differential operational amplifier; a first and a second capacitor, the first capacitor being coupled to an input of the differential operational amplifier; a first feedback circuit coupled to an output of the second capacitor, the input of the differential operational amplifier and an input of the switched-capacitor circuit; and a second feedback circuit coupled to an output of the first capacitor and an input of the second capacitor, wherein the first feedback circuit exhibits a gain configured to cancel, at least in part, a capacitance of the first capacitor. 17. The switched-capacitor circuit of claim 16 , wherein the first feedback circuit comprises a common source amplifier. 18. The switched-capacitor circuit of claim 16 , wherein the first feedback circuit comprises a flipped voltage follower. 19. The switched capacitor of claim 13 , wherein the first feedback circuit is configured to output a first signal and the second feedback circuit is configured to output a second feedback signal, wherein the first signal and the second signal have opposite phases. 20. The switched capacitor of claim 16 , wherein the first feedback circuit is configured to output a first signal and the second feedback circuit is configured to output a second feedback signal, wherein the first signal and the second signal have opposite phases.

Assignees

Inventors

Classifications

  • H03F1/083Primary

    in transistor amplifiers (H03F1/10 - H03F1/22 take precedence) · CPC title

  • the differential amplifier contains one or more explicit bias circuits, e.g. to bias the tail current sources, to bias the load transistors · CPC title

  • Modifications of amplifiers to reduce influence of variations of temperature or supply voltage {or other physical parameters (in differential amplifiers H03F3/45479)} · CPC title

  • A source follower being used in a feedback circuit of an amplifier stage · CPC title

  • the addition of two signals being made in a switched capacitor circuit for producing the common mode signal · CPC title

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What does patent US9847763B2 cover?
A switched-capacitor circuit comprising a differential operational amplifier and a feedback circuit is described. In some embodiments, the feedback circuit may be configured to provide a reference voltage that is insensitive to temperature and/or process variations. In some embodiments, the feedback circuit may be configured to mitigate the time delay associated with one or more capacitors of t…
Who is the assignee on this patent?
Mediatek Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/083. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).