Semiconductor device

Patent metadata

Field	Value
Publication number	US-9847430-B2
Application number	US-201615342333-A
Country	US
Kind code	B2
Filing date	Nov 3, 2016
Priority date	Jun 15, 2012
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

High field-effect mobility is provided for a transistor including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a bottom-gate transistor including an oxide semiconductor layer, an oxide semiconductor layer functioning as a current path (channel) of the transistor is sandwiched between oxide semiconductor layers having lower carrier densities than the oxide semiconductor layer. In such a structure, the channel is formed away from the interface of the oxide semiconductor stacked layer with an insulating layer in contact with the oxide semiconductor stacked layer, i.e., a buried channel is formed.

First claim

What is claimed is:

1. A semiconductor device comprising:
a transistor;
a photodiode electrically connected to the transistor; and
a first insulating layer between the transistor and the photodiode,
wherein the transistor comprises:
an oxide semiconductor stack comprising:
a first oxide semiconductor layer;
a second oxide semiconductor layer on and in contact with the first oxide semiconductor layer; and
a third oxide semiconductor layer in contact with a top surface of the second oxide semiconductor layer;

a gate electrode layer overlapping with the oxide semiconductor stack with a second insulating layer interposed therebetween; and
a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor stack,

wherein a difference between a Fermi level and a bottom of a conduction band in the second oxide semiconductor layer is smaller than those in the first oxide semiconductor layer and the third oxide semiconductor layer, and
wherein the first insulating layer comprises a first insulating film having a blocking property against hydrogen.

2. The semiconductor device according to claim 1 ,
wherein the first insulating layer is positioned over the transistor, and
wherein the photodiode is positioned over the first insulating layer.

3. The semiconductor device according to claim 1 , wherein the photodiode is electrically connected to the gate electrode layer of the transistor.

4. The semiconductor device according to claim 1 ,
wherein the second insulating layer is positioned over the gate electrode layer, and
wherein the oxide semiconductor stack is positioned over the second insulating layer.

5. The semiconductor device according to claim 1 , wherein the first insulating film is a silicon nitride film.

6. The semiconductor device according to claim 1 ,
wherein the first insulating layer comprises a second insulating film in contact with the oxide semiconductor stack, and
wherein the first insulating film is in contact with the second insulating film.

7. The semiconductor device according to claim 6 ,
wherein the first insulating film is a silicon nitride film, and
wherein the second insulating film is a silicon oxide film.

8. The semiconductor device according to claim 1 , wherein the oxide semiconductor stack is positioned over the gate electrode layer with the second insulating layer interposed therebetween.

9. The semiconductor device according to claim 1 , wherein the second oxide semiconductor layer comprises an impurity imparting an n-type conductivity.

10. A semiconductor device comprising:
a transistor;
a photodiode electrically connected to the transistor; and
a first insulating layer between the transistor and the photodiode,
wherein the transistor comprises:
an oxide semiconductor stack comprising:
a first oxide semiconductor layer;
a second oxide semiconductor layer on and in contact with the first oxide semiconductor layer; and
a third oxide semiconductor layer in contact with a top surface of the second oxide semiconductor layer;

a gate electrode layer overlapping with the oxide semiconductor stack with a second insulating layer interposed therebetween; and
a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor stack,

wherein a difference between a Fermi level and a bottom of a conduction band in the second oxide semiconductor layer is smaller than those in the first oxide semiconductor layer and the third oxide semiconductor layer,
wherein the photodiode comprises an amorphous silicon film, and
wherein the first insulating layer comprises a first insulating film having a blocking property against hydrogen.

11. The semiconductor device according to claim 10 ,
wherein the first insulating layer is positioned over the transistor, and
wherein the photodiode is positioned over the first insulating layer.

12. The semiconductor device according to claim 10 , wherein the photodiode is electrically connected to the gate electrode layer of the transistor.

13. The semiconductor device according to claim 10 ,
wherein the second insulating layer is positioned over the gate electrode layer, and
wherein the oxide semiconductor stack is positioned over the second insulating layer.

14. The semiconductor device according to claim 10 , wherein the first insulating film is a silicon nitride film.

15. The semiconductor device according to claim 10 ,
wherein the first insulating layer comprises a second insulating film in contact with the oxide semiconductor stack, and
wherein the first insulating film is in contact with the second insulating film.

16. The semiconductor device according to claim 15 ,
wherein the first insulating film is a silicon nitride film, and
wherein the second insulating film is a silicon oxide film.

17. The semiconductor device according to claim 10 , wherein the oxide semiconductor stack is positioned over the gate electrode layer with the second insulating layer interposed therebetween.

18. The semiconductor device according to claim 10 , wherein the second oxide semiconductor layer comprises an impurity imparting an n-type conductivity.

19. An electronic device comprising:
a display portion having a touch-input function and, capable of displaying a button used for the touch-input function on the display portion,
wherein the display portion comprises:
a transistor;
a photodiode electrically connected to the transistor; and
a first insulating layer between the transistor and the photodiode,

wherein the transistor comprises:
an oxide semiconductor stack comprising:
a first oxide semiconductor layer;
a second oxide semiconductor layer on and in contact with the first oxide semiconductor layer; and
a third oxide semiconductor layer in contact with a top surface of the second oxide semiconductor layer;

a gate electrode layer overlapping with the oxide semiconductor stack with a second insulating layer interposed therebetween; and
a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor stack,

wherein a difference between a Fermi level and a bottom of a conduction band in the second oxide semiconductor layer is smaller than those in the first oxide semiconductor layer and the third oxide semiconductor layer, and
wherein the first insulating layer comprises a first insulating film having a blocking property against hydrogen.

20. The electronic device according to claim 19 , wherein the photodiode comprises an amorphous silicon film.

21. The electronic device according to claim 19 ,
wherein the first insulating layer is positioned over the transistor, and
wherein the photodiode is positioned over the first insulating layer.

22. The electronic device according to claim 19 , wherein the photodiode is electrically connected to the gate electrode layer of the transistor.

23. The electronic device according to claim 19 ,
wherein the second insulating layer is positioned over the gate electrode layer, and
wherein the oxide semiconductor stack is positioned over the second insulating layer.

24. The electronic device according to claim 19 , wherein the first insulating film is a silicon nitride film.

25. The electronic device according to claim 19 ,
wherein the first insulating layer comprises a second insulating film in contact with the oxide semiconductor stack, and
wherein

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei

Classifications

• G06F3/0412

  Digitisers structurally integrated in a display · CPC title

• G06F3/04886

  by partitioning the display area of the touch-screen or the surface of the digitising tablet into independently controllable areas, e.g. virtual keyboards or menus · CPC title

• H01L27/14612

  Electricity · mapped topic

• H01L27/323

  Electricity · mapped topic

• H01L29/267

  Electricity · mapped topic