Flip chip bonding alloys

US9847310B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9847310-B2
Application numberUS-201514812861-A
CountryUS
Kind codeB2
Filing dateJul 29, 2015
Priority dateJul 18, 2015
Publication dateDec 19, 2017
Grant dateDec 19, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of bonding a plurality of die having first and second metal layers on a die surface to a board, comprising placing a first die onto a board comprising one of a ceramic or substrate board or metal lead frame having a solderable surface and placing the first die and the board into a reflow oven. The method includes reflowing at a first reflow temperature for a first period until the first metal board layer and at least one of the first and second metal die layers of the first die form an alloy to adhere the first die to the board. The newly formed alloy has a higher melting temperature than the first reflow temperature. Accordingly, additional die may be reflowed and attached to the board without causing the bonding of the first die to the board to fail if the same reflow temperature is used.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for flip chip mounting at least one die to a board, comprising: forming a plurality of solderable bond pads on a first die having at least one metal layer; depositing one of a solderable paste or bump on at least one of the plurality bond pads on the first die, for bonding to each of a plurality of matching bond pads of the board having at least two metal layers; performing a first reflow operation at a first reflow temperature to burn off at least one of flux and impurities and to melt the solderable paste or bump to form a first alloy; flip chip mounting the first die onto the board; performing a second reflow operation at a second reflow temperature to melt at least a portion of the first alloy to form a second alloy having a melting temperature that is higher than the first and second reflow temperatures, the second alloy including metal from bond pads of at least one of the die and the board; and subsequently flip chip mounting a second die to the board and subjecting the first and second die and the board to the first and second reflow temperatures in corresponding first and second reflow operations, thereby mounting the second die onto the board. 2. The method of claim 1 wherein the first die includes bond pads having a titanium layer, a nickel layer and a silver layer. 3. The method of claim 1 wherein the bond pads of the board comprise a copper layer. 4. The method of claim 1 wherein the bond pads of the board comprise a copper layer and a silver layer. 5. The method of claim 1 wherein the second alloy comprises metal from both the first die and board metal layers. 6. The method of claim 1 further including depositing a metallic paste on a top metal layer of the bond pads of the first die prior to flip chip mounting the second die. 7. An apparatus, comprising: a board that further includes a plurality of bond pads in a board bond pad pattern, each bond pad having at least one metal layer; a first die having a plurality of bond pads having a die bond pad pattern that matches the board bond pad pattern, wherein the first die is flip chip mounted to the board; wherein: the plurality of bond pads of the first die comprise at least two metal layers; and the plurality of bond pads of the board and the plurality of matching bond pads of the die are bonded with an alloy having a melting temperature that is higher than first and second reflow temperatures that were used to bond the board bond pads and the plurality of matching bond pads of the first die, through one of a solderable paste or bump deposited on the plurality bond pads, during corresponding first and second reflow operations; and the board further includes a bond pad device pattern for mounting a second die after the first die has been flip chip mounted to the board. 8. The apparatus of claim 7 wherein the plurality of bond pads of the first die comprise at least three metal layers. 9. The apparatus of claim 7 wherein the plurality of bond pads of the board comprise at least two metal layers. 10. The apparatus of claim 9 wherein the at least two metal layers of the plurality of bond pads of the die comprise silver and tin. 11. The apparatus of claim 10 wherein the at least one metal layer of the plurality of bond pads of the board comprises copper. 12. The apparatus of claim 7 wherein the at least two metal layers of the plurality of bond pads of the first die comprise silver and nickel layers. 13. The apparatus of claim 12 wherein the at least two metal layers of the plurality of bond pads of the die comprise a titanium layer. 14. The apparatus of claim 12 wherein the at least one metal layer of the bond pads of the board comprises silver. 15. The apparatus of claim 12 wherein the at least one metal layer of the bond pads of the board comprises silver and copper layers. 16. The apparatus of claim 7 wherein the alloy comprises one of a tin, silver and copper alloy or a tin and silver alloy. 17. The apparatus of claim 7 further including a plurality of die that are flip chip mounted in proximity without any metals or alloys connecting bond pads of adjacent die. 18. The apparatus of claim 7 , wherein: the first die has a plurality of bond pads that each comprises: at least one of a nickel and a copper layer; and at least one of a silver, a tin and a silver/tin alloy layer; and the board has a plurality of bond pads that each comprises at least one of: a copper layer; a silver layer; a silver/tin alloy layer; and copper and silver layers.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • changes in materials · CPC title

  • Soldering or alloying · CPC title

  • Using a reflow oven · CPC title

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Frequently asked questions

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What does patent US9847310B2 cover?
A method of bonding a plurality of die having first and second metal layers on a die surface to a board, comprising placing a first die onto a board comprising one of a ceramic or substrate board or metal lead frame having a solderable surface and placing the first die and the board into a reflow oven. The method includes reflowing at a first reflow temperature for a first period until the firs…
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H10W72/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).