Electronic device for packing multiple commands in one compound command frame and electronic device for decoding and executing multiple commands packed in one compound command frame

Patent metadata

Field	Value
Publication number	US-9846657-B2
Application number	US-201514934085-A
Country	US
Kind code	B2
Filing date	Nov 5, 2015
Priority date	Feb 6, 2015
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

An electronic device includes a control circuit and a bus interface. The control circuit packs a plurality of commands in a compound command frame. The bus interface communicates with another electronic device via a bus between the electronic device and the another electronic device, and packs the compound command frame in a single packet and transmits the single packet over the bus.

First claim

What is claimed is:

1. An electronic device comprising:
a storage device, arranged to store a compound command frame;
a control circuit, arranged to pack a plurality of commands in a compound command frame; and send an address pointer indicative of a location of the compound command frame in the storage device and a length indicator indicative of a length of the compound command frame to another electronic device, wherein each of the commands packed in the compound command frame comprises at least a type and length field that is arranged to indicate a type of the command and a length of the command; and
a bus interface, arranged to communicate with the another electronic device via a bus between the electronic device and the another electronic device, wherein the bus interface is further arranged to pack the compound command frame in a single packet and transmit the single packet over the bus; and the compound command frame is read from the storage device and transmitted over the bus without intervention of the control circuit;
wherein the control circuit is further arranged to perform a polling operation upon the storage device for checking an execution status of all commands within the compound command frame.

2. The electronic device of claim 1 , wherein the control circuit is a multi-core processor having a plurality of processor cores, the storage device has a plurality of command queues allocated for the processor cores respectively, and the compound command frame generated from a processor core is stored into a corresponding command queue.

3. The electronic device of claim 1 , wherein the electronic device is a host, and the another electronic device is a switch.

4. The electronic device of claim 1 , wherein the bus is a Peripheral Component Interconnect Express (PCIe) bus.

5. An electronic device comprising:
a bus interface, arranged to communicate with another electronic device via a bus between the electronic device and the another electronic device, wherein the bus interface is further arranged to receive a single packet from the bus, where the single packet comprises a compound command frame having a plurality of commands packed therein, wherein each of the commands packed in the compound command frame comprises at least a type and length field that is arranged to indicate a type of the command and a length of the command; and
a control circuit, arranged to decode the compound command frame, receive an address pointer indicative of a location of the compound command frame in a storage device and a length indicator indicative of a length of the compound command frame from the another electronic device, and sequentially execute the commands packed in the compound command frame, comprising:
a direct memory access (DMA) controller arranged to fetch the compound command frame from the storage device of the another electronic device through the bus interface according to the address pointer indicative and the length indicator;

wherein the control circuit is further arranged to push an execution status of all commands within the compound command frame to the storage device of the another electronic device over the bus.

6. The electronic device of claim 5 , wherein the storage device has a plurality of command queues allocated for a plurality of processor cores respectively, and the control circuit fetches the compound command frame from one of the command queues.

7. The electronic device of claim 5 , wherein the electronic device is a switch, and the another electronic device is a host.

8. The electronic device of claim 5 , wherein the bus is a Peripheral Component Interconnect Express (PCIe) bus.

9. An electronic device comprising:
a storage device;
a control circuit, arranged to pack a plurality of commands in a compound command frame, wherein each of the commands packed in the compound command frame comprises at least a type and length field that is arranged to indicate a type of the command and a length of the command; and
a bus interface, arranged to communicate with another electronic device via a bus between the electronic device and the another electronic device, wherein the bus interface is further arranged to pack the compound command frame in a single packet and transmit the single packet over the bus;
wherein the control circuit is arranged to perform a polling operation upon the storage device for checking a response status of each of all the commands within the compound command frame; and is further arranged to perform the polling operation upon the storage device for checking an execution status of all commands within the compound command frame; the execution status is updated at least after all the commands are executed.

10. An electronic device comprising:
a bus interface, arranged to communicate with another electronic device via a bus between the electronic device and the another electronic device, wherein the bus interface is further arranged to receive a single packet from the bus, where the single packet comprises a compound command frame having a plurality of commands packed therein, wherein each of the commands packed in the compound command frame comprises at least a type and length field that is arranged to indicate a type of the command and a length of the command; and
a control circuit, arranged to decode the compound command frame and sequentially execute the commands packed in the compound command frame;
wherein the control circuit is further arranged to push a response status of each of all the commands within the compound command frame to a storage device of the another device; and is further arranged to push an execution status of all commands within the compound command frame to the storage device of the another device over the bus; the execution status is updated at least after all of the commands are executed.

Assignees

• Mediatek Inc

Inventors

• Chang Chen-Hao
• Su Yao-Chun
• Chen Shin-Shiun
• Chen Hong-Ching

Classifications

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F13/22

  using successive scanning, e.g. polling (G06F13/24 takes precedence) · CPC title

• G06F13/102 Primary

  where the program performs an interfacing function, e.g. device driver (G06F13/105 takes precedence; contention policies within device drivers G06F9/4881; scheduling within device drivers G06F9/52) · CPC title

• G06F13/4068

  Electrical coupling · CPC title