Variable ball height on ball grid array packages by solder paste transfer

Patent metadata

Field	Value
Publication number	US-9842818-B2
Application number	US-201615083089-A
Country	US
Kind code	B2
Filing date	Mar 28, 2016
Priority date	Mar 28, 2016
Publication date	Dec 12, 2017
Grant date	Dec 12, 2017

Abstract

BGA packages with a spatially varied ball height, molds and techniques to form such packages. A template or mold with cavities may be pre-fabricated to hold solder paste material applied to the mold, for example with a solder paste printing process. The depth and/or diameter of the cavities may be predetermined as a function of spatial position within the mold working surface area. Mold cavity dimensions may be specified corresponding to package position to account for one or more pre-existing or expected spatial variations in the package, such as a package-level warpage measurement. Any number of different ball heights may be provided. The molds may be employed in a standardize process that need not be modified with each change in the mold.

First claim

What is claimed is:

1. A method of assembling a ball grid array (BGA) package, the method comprising:
applying a stencil over a surface of a mold, the mold comprising a first cavity having a first depth and a second cavity having a second depth, greater than the first depth;
loading the first mold cavity with a first volume of solder paste, and loading the second mold cavity with a second volume of solder paste, larger than the first volume, by applying solder paste through openings in the stencil;
exposing a surface of the solder paste volumes by removing the stencil from the surface of the mold;
joining the mold to a package substrate with the first volume of solder paste contacting a first BGA land and the second volume of solder paste contacting a second BGA land, wherein the second BGA land is located more proximal to a perimeter of the package substrate than the first BGA land;
transferring the paste from the mold to the package substrate by reflowing the solder paste sufficiently for the paste to migrate from the cavities; and
separating the mold from the package substrate.

2. The method of claim 1 , wherein a lateral dimension of the stencil openings is smaller than that of the cavities.

3. The method of claim 1 , wherein joining the mold to the package substrate further comprises:
facing a surface of the mold comprising one or more cavities filled with solder paste to a surface of the package substrate comprising one or more BGA lands;
aligning the cavities with the lands; and
contacting the solder paste to the lands.

4. The method of claim 3 , wherein joining the mold to the package substrate further comprises pick-and-placing a first of the mold and package onto a second of the mold and package.

5. The method of claim 1 , wherein the mold comprises one or more cavities having a surface that is non-wettable by solder.

6. The method of claim 1 , wherein the first cavity has a first lateral dimension smaller than that of a solder resist opening (SRO) disposed on the package substrate around the first BGA land.

7. The method of claim 6 , wherein:
the second cavity is in a region of the mold corresponding to a BGA land position more proximal to a perimeter edge of the package substrate than the first cavity; and
after separating the substrate from the mold, solder paste transferred to the first BGA land from the first cavity has a first height less than that of solder paste transferred to the second BGA land from the second cavity.

8. The method of claim 1 , wherein:
applying the stencil further comprises masking at least one of the mold cavities with the stencil; and
joining the mold to the package substrate further comprises aligning one of the mold cavities that was masked by the stencil with a land-side component on the package substrate.

9. The method of claim 1 , further comprising performing a solder paste reflow subsequent to removing the mold to form solder features in contact with the lands.

10. The method of claim 9 , wherein the solder features comprise a SnAgCu alloy.

11. The method of claim 10 , wherein the first and second solder features have voids of at least 15% of the solder area.

12. The method of claim 10 , wherein the solder features comprise first solder feature having a first height and a second solder feature having a second height, the second height exceeding the first height by more than 10% of the first height and wherein the second solder feature is more proximal to a perimeter edge of the package than the first solder feature.

13. The method of claim 1 , wherein the mold comprises a grid array of cavities having a pitch no more than 600 μm.

14. The method of claim 13 , wherein the cavities have a lateral diameter no more than 250 μm.

15. The method of claim 1 , wherein the mold comprises at least one of liquid crystal polymer or graphite.

16. The method of claim 1 , wherein the mold comprises a stainless steel body coated with a material that is non-wettable by solder.

Assignees

• Intel Corp

Inventors

• Li Eric J
• Yao Jimin
• Liff Shawna M

Classifications

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W70/68

  Shapes or dispositions thereof · CPC title

• H10W70/098

  Applying pastes or inks, e.g. screen printing (H10W70/095 takes precedence) · CPC title

• H10W90/701 Primary

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W72/01204

  using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates · CPC title