Ablation for feature recovery

US9842740B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9842740-B2
Application numberUS-201514835326-A
CountryUS
Kind codeB2
Filing dateAug 25, 2015
Priority dateAug 29, 2014
Publication dateDec 12, 2017
Grant dateDec 12, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

When opaque films are deposited on semi-conductor wafers, underlying features may be concealed. In accordance with one implementation, such concealed features may be re-exposed via an ablation recovery process. One ablation recovery process entails aligning an energy source with a target position on a first surface of a semiconductor wafer based on position information retrieved from a second opposite surface of the semiconductor wafer, and firing a beam of the energy source to ablate opaque material at the target position and to expose a recovery feature underlying the opaque material.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: determining an offset between an alignment feature visible on a first surface of a semiconductor wafer and a recovery feature embedded below a second opposite surface of the semiconductor wafer, the recovery feature separated from the second opposite surface by at least one layer of opaque material; aligning an energy source with a target position on the second opposite surface of the semiconductor wafer based on the determined offset between the recovery feature and the alignment feature; and firing a beam of the energy source to ablate opaque material at the target position and to expose the recovery feature underlying the opaque material. 2. The method of claim 1 , wherein the energy source is a laser. 3. The method of claim 1 , wherein aligning the energy source further comprises: aligning the energy source with the target position using the alignment feature visible on the first surface. 4. The method of claim 3 , further comprising: etching the alignment feature on the first surface of the semiconductor wafer; and rotating the semiconductor by 180 degrees prior to the alignment operation. 5. The method of claim 3 , further comprising: positioning a mirror to reflect an image of the second surface including the alignment feature. 6. The method of claim 3 , further comprising: capturing, with a camera, a reflection of the alignment feature in a mirror; and identifying a position of the recovery feature based on the reflection. 7. The method of claim 6 , further comprising: defining a target ablation region based on the identified position of the recovery feature. 8. The method of claim 7 , wherein the target position is within the target ablation region. 9. The method of claim 1 , wherein firing the beam further comprises: pulsing the beam to remove material down to a predetermined depth. 10. The method of claim 7 , wherein the energy source performs a raster scan to ablate material in the target ablation region. 11. A system comprising: a camera positioned to capture an image of a first surface of a semiconductor wafer including an alignment feature; a control system communicatively coupled to the camera, the control system configured to use feedback from the camera and a saved offset between the alignment feature and a recovery feature to identify a position on a second opposite surface of the semiconductor wafer aligned with the recovery feature, the second opposite surface separated from the recovery feature by a layer of opaque material; and a laser communicatively coupled to the control system, wherein the control system is further configured to control the laser to ablate the layer of opaque material at the identified position on the second opposite surface to expose the recovery feature. 12. The system of claim 11 , wherein the image of the first surface captured by the camera is a reflection of the first surface. 13. The system of claim 11 , wherein the alignment feature is etched into the first surface. 14. The system of claim 11 , wherein the control system is further configured to define bounds of a target ablation region based on the identified position of the recovery feature. 15. The system of claim 11 , wherein the laser is a pulsed-diode laser. 16. A method comprising: generating an image of an alignment feature on a first surface of a semiconductor wafer; identifying a target position on a second opposite surface of the semiconductor wafer based on the image, the target position aligned with a recovery feature embedded within the semiconductor wafer and separated from the second opposite surface by a layer of opaque material; firing a laser to ablate opaque material from a second opposite surface of the semiconductor wafer to expose the recovery feature on the second opposite surface, the recovery feature vertically aligned with the alignment feature. 17. The method of claim 16 , wherein the image is captured by a camera. 18. The method of claim 17 , wherein the image is a mirror reflection of the first surface captured by the camera. 19. The method of claim 16 , further comprising: etching the recovery feature into the second opposite surface.

Assignees

Inventors

Classifications

  • for use before dicing · CPC title

  • for alignment · CPC title

  • characterised by the type of information, e.g. logos or symbols · CPC title

  • characterised by multiple measurements, corrections, marking or sorting processes · CPC title

  • H10W46/00Primary

    Marks applied to devices, e.g. for alignment or identification · CPC title

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Frequently asked questions

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What does patent US9842740B2 cover?
When opaque films are deposited on semi-conductor wafers, underlying features may be concealed. In accordance with one implementation, such concealed features may be re-exposed via an ablation recovery process. One ablation recovery process entails aligning an energy source with a target position on a first surface of a semiconductor wafer based on position information retrieved from a second o…
Who is the assignee on this patent?
Seagate Technology Llc
What technology area does this patent fall under?
Primary CPC classification H10W46/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).