Power-module substrate unit and power module

US9837363B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9837363-B2
Application numberUS-201515320798-A
CountryUS
Kind codeB2
Filing dateJun 30, 2015
Priority dateJul 4, 2014
Publication dateDec 5, 2017
Grant dateDec 5, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In a power-module substrate unit, a circuit layer is structured by a plurality of small circuit layers; a ceramic substrate layer is structured by at least one plate; the small circuit layers are formed to have a layered structure having a first aluminum layer bonded on one surface of the ceramic substrate layer and a first copper layer bonded on the first aluminum layer by solid diffusion; a radiation plate is made of copper or copper alloy; the metal layer and the radiation plate are bonded by solid diffusion.

First claim

Opening claim text (preview).

The invention claimed is: 1. A power-module substrate unit comprising: a ceramic substrate layer; a circuit layer structured from a plurality of small circuit layers joined on one surface of the ceramic substrate layer; a metal layer joined on other surface of the ceramic substrate layer; and one radiation plate joined on the metal layer, wherein each of the small circuit layers has a layered structure comprising a first aluminum layer joined on the one surface of the ceramic substrate layer and a first copper layer joined on the first aluminum layer by solid diffusion bonding; the metal layer is made from a same material as that of the first aluminum layer; the radiation plate is made from copper or copper alloy and joined on the metal layer by solid diffusion bonding; and a ratio (t 1 ×A 1 ×σ 1 )/(t 2 ×A 2 ×σ 2 ) is not smaller than 0.80 and not larger than 1.20: where a thickness of the first copper layer is t 1 (mm); a bonding area of the first copper layer is A 1 (mm 2 ); an yield stress of the first copper layer is σ 1 (N/mm 2 ); a thickness of the radiation plate at a bonding position to the metal layer is t 2 (mm); a bonding area of the radiation plate is A 2 (mm 2 ); and an yield stress of the radiation plate is σ 2 (N/mm 2 ). 2. The power-module substrate unit according to claim 1 , wherein the ceramic substrate layer is structured by a same number of small ceramic substrates as that of the small circuit layers; the metal layer is structured by a same number of small metal layers as that of the small circuit layers; and a plurality of power-module substrates made by joining the small circuit layers and the small metal layers to each other with the small ceramic substrate therebetween are joined on the radiation plate with spacing. 3. The power-module substrate unit according to claim 1 comprising a power-module substrate joined on the radiation plate with the metal layer made of one plate therebetween, wherein the ceramic substrate layer is structured by a same number of small ceramic substrate as that of the small circuit layers; layered substrates are structured by joining the small circuit layers and the small ceramic substrates; and the power-module substrate is structured by joining the layered substrates with spacing on the metal plate. 4. The power-module substrate unit according to claim 1 , comprising a power-module substrate joined on the radiation plate with the metal layer therebetween, wherein the ceramic substrate layer is structured by one plate; the metal layer is structured by a same number of small metal layers as that of the small circuit layers; and the power-module substrate is structured by joining the small circuit layers and the small metal layers with the ceramic substrate layer therebetween with spacing in a surface direction of the ceramic substrate layer. 5. The power-module substrate unit according to claim 1 comprising a power-module substrate joined on the radiation plate with the metal layer structured by one plate therebetween, wherein the ceramic substrate layer is structured by one plate; the small circuit layers are joined on the one surface of the ceramic substrate layer with spacing; and the power-module substrate is structured by joining the metal layer on the other surface of the ceramic substrate layer. 6. The power-module substrate unit according to claim 1 , wherein the first aluminum layer and the first copper layer are joined with a titan layer therebetween by solid diffusion bonding. 7. The power-module substrate unit according to claim 1 , wherein the metal layer and the radiation plate are joined with a titan layer therebetween by solid diffusion bonding. 8. The power-module substrate unit according to claim 1 , wherein the first aluminum layer and the first copper layer, and the metal layer and the radiation plate are respectively joined with titan layers therebetween by solid diffusion bonding. 9. A power module comprising the power-module substrate unit according to claim 1 ; a semiconductor element and an external-connection lead frame which are connected to at least one of the small circuit layers of the power-module substrate unit; and a molded resin sealing the semiconductor element and the power-module substrate unit except a surface of the radiation plate.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between laterally-adjacent chips · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • the semiconductor body being completely enclosed · CPC title

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Frequently asked questions

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What does patent US9837363B2 cover?
In a power-module substrate unit, a circuit layer is structured by a plurality of small circuit layers; a ceramic substrate layer is structured by at least one plate; the small circuit layers are formed to have a layered structure having a first aluminum layer bonded on one surface of the ceramic substrate layer and a first copper layer bonded on the first aluminum layer by solid diffusion; a r…
Who is the assignee on this patent?
Mitsubishi Materials Corp
What technology area does this patent fall under?
Primary CPC classification H10W42/121. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).