Methods for manufacturing semiconductor devices

Patent metadata

Field	Value
Publication number	US-9837280-B2
Application number	US-201615229632-A
Country	US
Kind code	B2
Filing date	Aug 5, 2016
Priority date	Nov 21, 2012
Publication date	Dec 5, 2017
Grant date	Dec 5, 2017

Abstract

A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.

First claim

What is claimed is:

1. A method for forming a semiconductor device, the method comprising:
providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate;
forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas;
at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure; and
at least partly removing the support structure.

2. The method of claim 1 , wherein at least partly replacing the sacrificial layers comprises at least one of etching the sacrificial layers selective to the semiconductor mesas to expose sidewalls of the semiconductor mesas, and thermal oxidizing the sidewalls; and/or wherein the support structure is formed substantially above the semiconductor mesas.

3. The method of claim 1 , wherein the sacrificial layers comprise a dielectric material, carbon, diamond-like carbon, a photo resist, a polycrystalline semiconductor material, an amorphous semiconductor material and/or a second monocrystalline semiconductor material different to the first monocrystalline semiconductor material.

4. A method for forming a semiconductor device, the method comprising:
providing a semiconductor substrate comprising an upper side and a semiconductor layer comprised of a semiconductor material and extending to the upper side;
etching wide trenches from the upper side into the semiconductor layer so that first semiconductor mesas are formed which are separated from each other by the wide trenches and connected by semiconductor portions comprised of the semiconductor material;
forming dielectric layers at least at sidewalls of the first semiconductor mesas; and
performing a selective epitaxial growth process to fill at least one of the wide trenches with a second semiconductor mesa.

5. The method of claim 4 , wherein forming the dielectric layers comprises oxidizing the sidewalls of the first semiconductor mesas and/or at least partially oxidizing the semiconductor portions.

6. The method of claim 4 , wherein the dielectric layers are formed such that they are substantially ring-shaped when viewed from above.

Assignees

• Infineon Technologies Dresden Gmbh

Inventors

• Sorschag Kurt
• Sarlette Daniel
• Braun Felix
• Heller Marcel
• Kaiser Dieter
• Meusel Ingo
• Lemke Marko
• Mauder Anton
• Strack Helmut

Classifications

• H10P50/28

  of insulating materials · CPC title

• H10P50/00

  Etching of wafers, substrates or parts of devices · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10P14/36

  characterised by treatments done before the formation of the materials · CPC title

• H10P50/642 Primary

  Chemical etching · CPC title