FinFET with rounded source/drain profile

Patent metadata

Field	Value
Publication number	US-9831345-B2
Application number	US-201313792475-A
Country	US
Kind code	B2
Filing date	Mar 11, 2013
Priority date	Mar 11, 2013
Publication date	Nov 28, 2017
Grant date	Nov 28, 2017

Abstract

A method of forming a FinFET with a rounded source/drain profile comprises forming a fin in a substrate, etching a source/drain recess in the fin, forming a plurality of source/drain layers in the source/drain recess; and etching at least one of the plurality of source/drain layers. The source/drain layers may be a silicon germanium compound. Etching at the source/drain layers may comprises partially etching each of the plurality of source/drain layers prior to forming subsequent layers of the plurality of source/drain layers. The source/drain layers may be formed with a thickness at a top corner of about 15 nm, and the source/drain layers may each be etched back by about 3 nm prior to forming subsequent layers of the plurality of source/drain layers. Forming the plurality of source/drain layers optionally comprises forming at least five source/drain layers.

First claim

What is claimed is:

1. A method of forming a device, comprising:
forming a first fin and a second fin in a substrate;
etching back the first fin to create a source/drain recess in a first source/drain region while leaving a first channel region of the first fin un-etched, thus forming a step between the un-etched channel region and a bottom of the source/drain recess;
epitaxially growing a plurality of source/drain layers in the source/drain recess;
etching a first one of the plurality of source/drain layers to at least partially round corners of a faceted profile of the first one of the plurality of source/drain layers;
etching a second one of the plurality of source/drain layers, overlying the first one of the plurality of source/drain layers, to at least partially round corners of a faceted profile of the second one of the plurality of source/drain layers;
epitaxially growing a topmost one of the plurality of source/drain layers over the second one of the plurality of source/drain layers;
forming a second plurality of source/drain layers adjacent a second channel region of the second fin; and
forming a gate structure over and extending along sidewalls of the first fin and the second fin, wherein the plurality of source/drain layers is physically separated from the second plurality of source/drain layers.

2. The method of claim 1 , wherein the plurality of source/drain layers are formed from a silicon germanium compound.

3. The method of claim 1 , wherein etching the at least one of the plurality of source/drain layers comprises partially etching each of the plurality of source/drain layers prior to forming subsequent layers of the plurality of source/drain layers.

4. The method of claim 3 , wherein forming the plurality of source/drain layers comprises forming each of the plurality of source/drain layers with a thickness at a top corner of about 15 nm, and wherein the etching comprises etching each of the plurality of source/drain layers by about 3 nm prior to forming subsequent layers of the plurality of source/drain layers.

5. The method of claim 4 , wherein forming the plurality of source/drain layers comprises forming a topmost source/drain layer having a rounded profile.

6. The method of claim 1 , wherein forming the plurality of source/drain layers comprises forming at least five source/drain layers.

7. A method of forming a device, comprising:
forming a plurality of fins in a substrate, each fin of the plurality of fins extending along a longitudinal axis;
etching the plurality of fins to create a plurality of source/drain recesses, wherein after the etching, each fin of the plurality of fins has, when viewed along the longitudinal axis, a topmost surface that includes an un-etched region, a bottom surface of the source/drain recess, and a step between the un-etched region and the bottom surface of the source/drain recess; and
forming a plurality of source/drain structures, comprising:
forming a plurality of first source/drain layers, each of the plurality of first source/drain layers disposed in respective ones of the plurality of source/drain recesses, and each of the plurality of first source/drain layers having a faceted profile with corners;
etching the plurality of first source/drain layers to round the corners;
forming a plurality of second source/drain layers over each of the plurality of first source/drain layers, each of the plurality of second source/drain layers having a faceted profile with second corners;
etching each of the plurality of second source/drain layers to round the second corners; and
forming a plurality of topmost source/drain layers, each of the plurality of topmost source/drain layers over a plurality of second source/drain layers.

8. The method of claim 7 , wherein forming the plurality of fins comprises forming the plurality of fins with a fin pitch of less than about 48 nm.

9. The method of claim 8 , wherein the forming the plurality of first source/drain layers further comprises forming each of the plurality of source/drain structures with a cross sectional area of at least two-thirds of the area of a product of a height and a width of respective ones of the plurality of source/drain structures.

10. The method of claim 8 , wherein the forming the plurality of source/drain structures further comprises forming each of the plurality of source/drain structures with a width to a height ratio of at least 0.75.

11. The method of claim 7 , further comprising forming a plurality of shallow trench isolation (STI) structures, each of the plurality of STIs disposed between adjacent ones of the plurality of fins, wherein forming the first source/drain layer comprises epitaxially growing a plurality of silicon germanium compound first source/drain layers each disposed in respective ones of the plurality of source/drain recesses and extending above a top surface of the STIs.

12. The method of claim 11 , wherein the plurality of first source/drain layers are formed to extend above the top surface of the STIs by at least 15 nm, and wherein each one of the plurality of second source/drain layers is formed to have a height at a top corner of at least 15 nm.

13. The method of claim 12 , wherein the etching the plurality of first source/drain layers comprises etching each of the plurality of first source/drain layers by at least 3 nm at a top corner and wherein the etching the plurality of second source/drain layers comprises etching each of the plurality of second source/drain layers by at least 3 nm at a top corner.

14. The method of claim 7 , wherein the forming the plurality of topmost source/drain layers comprises forming each of the plurality of topmost source/drain layers with a top portion above a top surface of respective ones of the plurality of fins.

15. A method, comprising:
forming on a semiconductor substrate a fin structure protruding from a major surface of the semiconductor substrate, the fin structure surrounded by an isolation feature;
recessing top portions of the fin structure to form a source/drain recesses the source/drain recesses extending below a topmost surface of the isolation feature, the source/drain recesses forming respective steps with un-etched portions of the fin structure;
epitaxially growing a first source/drain material in the source/drain recesses;
rounding corners of the first source/drain material by etching top surfaces of the first source/drain material, wherein etching the top surfaces of the first source/drain material reduces a total number of facets of the first source/drain material; and
epitaxially growing a second source/drain material on the rounded corners of the first source/drain material;
rounding corners of the second source/drain material; and
growing a topmost source/drain material on the rounded corners of the second source/drain material.

16. The method of claim 15 , further comprising:
rounding corners of the second source/drain material; and
growing a third source/drain material on the rounded corners of the second source/drain material.

17. The method of claim 15 , wherein the step of epitaxially growing a first source/drain material in the source/drain recess includes growing the first source/drain material above a topmost surface of the isolation feature.

18. The method of claim 15 , wherein the step of rounding corners of the first source/drain material comprises etching the first source/drain material.

19. The method of claim 18 , wherein etching the first source/drain material is performed using an HCl solution at a pressur

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Yu Ming-Hua
• Tsao Chih-Pin
• Jeng Pei-Ren
• Lee Tze-Liang

Classifications

• H10D30/024

  of fin field-effect transistors [FinFET] · CPC title

• H10D30/62 Primary

  Fin field-effect transistors [FinFET] · CPC title

• H01L29/66795

  Electricity · mapped topic

• H01L29/66477

  Electricity · mapped topic

• H01L29/785 Primary

  Electricity · mapped topic