Negative voltage testing methodology and tester

US9823294B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9823294-B1
Application numberUS-201414278957-A
CountryUS
Kind codeB1
Filing dateMay 15, 2014
Priority dateOct 29, 2013
Publication dateNov 21, 2017
Grant dateNov 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A negative voltage testing including a monitoring and triggering circuit coupled to a supply voltage rail of a device under test (DUT) and a switching circuit coupled to the monitoring and triggering circuit. The monitoring and triggering circuit is configured to cause the switching circuit to provide a first negative voltage to the supply voltage rail when a supply voltage on the supply voltage rail decays below a predetermined level during a first test of the DUT.

First claim

Opening claim text (preview).

What is claimed is: 1. A negative voltage tester comprising: a monitoring and triggering circuit coupled to a positive supply voltage rail that supplies a positive supply voltage greater than zero to a device under test (DUT); and a switching circuit coupled to the monitoring and triggering circuit; wherein the monitoring and triggering circuit is configured to: perform a negative voltage test of the DUT by causing the switching circuit to provide a first negative voltage to the positive supply voltage rail when the positive supply voltage on the positive supply voltage rail decays below a predetermined level, and repeat the negative voltage test until failure of the DUT, an amplitude of the negative voltage being increased for each repetition of the negative voltage test, wherein the DUT comprises a power device coupled to the positive supply voltage rail, wherein the power device is coupled to test equipment via one or more output lines, and the test equipment is configured to detect a failure condition in the DUT by monitoring the one or more output lines, wherein the DUT further comprises disk drive mechanics coupled to at least a first one of the output lines of the power device and a system on a chip (SoC) coupled to at least a second one of the output lines of the power device, and wherein the test equipment is coupled to at least one of the first one and the second one of the output lines of the power device. 2. The negative voltage tester as recited in claim 1 , further comprising a negative voltage source coupled to the switching circuit and configured to provide the negative voltage to the switching circuit during the negative voltage test. 3. The negative voltage tester as recited in claim 1 , wherein the switching circuit is configured to provide the negative voltage to the positive supply voltage rail in response to a signal from the monitoring and triggering circuit. 4. The negative voltage tester as recited in claim 1 , wherein the positive supply voltage rail is coupled to a supply voltage source, and wherein the supply voltage source is turned off when the negative voltage test begins to cause the positive supply voltage to decay below the predetermined level. 5. The negative voltage tester as recited in claim 4 , wherein the supply voltage source is situated inside the negative voltage tester. 6. The negative voltage tester as recited in claim 1 , wherein the DUT is powered on by providing the positive supply voltage on the positive supply voltage rail prior to the start of each negative voltage test, and wherein in the each negative voltage test the DUT is powered off to cause the positive supply voltage on the positive supply voltage rail to decay below the predetermined level. 7. The negative voltage tester as recited in claim 1 , wherein the monitoring and triggering circuit comprises a comparator having an output coupled to an input of a pulse generator, and wherein the pulse generator causes the switching circuit to provide the negative voltage to the positive supply voltage rail. 8. A test system for testing a response of a device under test (DUT) to negative voltage, the test system comprising: a negative voltage tester comprising: a monitoring and triggering circuit coupled to a positive supply voltage rail to receive a positive supply voltage that is greater than zero; and a switching circuit coupled to the monitoring and triggering circuit; wherein the monitoring and triggering circuit is configured to: perform a negative voltage test of the DUT by causing the switching circuit to provide a negative voltage to the positive supply voltage rail when the positive supply voltage on the positive supply voltage rail decays below a predetermined level, and repeat the negative voltage test until failure of the DUT, an amplitude of the negative voltage being increased for each repetition of the negative voltage test, and wherein the DUT comprises a power device coupled to the positive supply voltage rail; and test equipment coupled to one or more output lines of the power device, and configured to detect a failure condition in the DUT by monitoring the one or more output lines, wherein the DUT further comprises disk drive mechanics coupled to at least a first one of the output lines of the power device and a system on a chip (SoC) coupled to at least a second one of the output lines of the power device, and wherein the test equipment is coupled to at least one of the first one and the second one of the output lines of the power device. 9. The test system as recited in claim 8 , wherein the negative voltage tester further comprises a negative voltage source coupled to the switching circuit and configured to provide the negative voltage to the switching circuit during the negative voltage test. 10. The test system as recited in claim 9 , further comprising a supply voltage source coupled to the positive supply voltage rail, and wherein in the negative voltage test the supply voltage source is turned off to cause the positive supply voltage to decay below the predetermined level. 11. The test system as recited in claim 10 , wherein the supply voltage source is situated inside the negative voltage tester. 12. The test system as recited in claim 8 , wherein the DUT is powered on prior to each negative voltage test performed. 13. The test system as recited in claim 8 , wherein the supply voltage source is turned on to power on the DUT prior to the start of each negative voltage test and is turned off at the start of each negative voltage test. 14. The test system as recited in claim 8 , wherein the monitoring and triggering circuit comprises a comparator having an output coupled to an input of a pulse generator, and wherein the pulse generator causes the switching circuit to provide the negative voltage to the positive supply voltage rail. 15. A method of using a negative voltage tester to test a device under test (DUT) in a test system comprising the negative voltage tester and the DUT, the DUT comprising a positive supply voltage rail for receiving a positive supply voltage that is greater than zero and a power device coupled to the positive supply voltage rail, the negative voltage tester comprising a monitoring and triggering circuit coupled to the positive supply voltage rail and a switching circuit coupled to the monitoring and triggering circuit and the supply voltage rail, the method comprising: causing the switching circuit to provide a negative voltage to the positive supply voltage rail when an initial supply voltage on the positive supply voltage rail decays below a predetermined level during a negative voltage test of the DUT; repeating the negative voltage test until failure of the DUT, an amplitude of the negative voltage being increased for each repetition of the negative voltage test, wherein the test system further comprises test equipment coupled to one or more output lines of the power device; and detecting a failure condition in the DUT by monitoring the one or more output lines of the power device, wherein the DUT further comprises drive mechanics coupled to at least a first one of the output lines of the power device and a system on a chip (SoC) coupled to at least a second one of the output lines of the power device, and wherein the test equipment is coupled to at least one of the first one and the second one of the output lines of the power device. 16. The method as recited in claim 15 , wherein: the negative voltage tester further comprises a negative voltage source coupled to the switching circuit; and the method further comprises provi

Assignees

Inventors

Classifications

  • Fault-finding or characterising (G01R31/2822 - G01R31/2831 take precedence) · CPC title

  • External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor · CPC title

  • G11C29/021Primary

    in voltage or current generators · CPC title

  • Current or voltage test · CPC title

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What does patent US9823294B1 cover?
A negative voltage testing including a monitoring and triggering circuit coupled to a supply voltage rail of a device under test (DUT) and a switching circuit coupled to the monitoring and triggering circuit. The monitoring and triggering circuit is configured to cause the switching circuit to provide a first negative voltage to the supply voltage rail when a supply voltage on the supply voltag…
Who is the assignee on this patent?
Western Digital Tech Inc
What technology area does this patent fall under?
Primary CPC classification G01R31/2836. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).