On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems

Patent metadata

Field	Value
Publication number	US-9823282-B2
Application number	US-201514735223-A
Country	US
Kind code	B2
Filing date	Jun 10, 2015
Priority date	Nov 22, 2010
Publication date	Nov 21, 2017
Grant date	Nov 21, 2017

Abstract

An integrated circuit includes a functional circuit ( 10 ) having a power grid ( 20 ) with a set of power grid points ( 30 .i ) for monitoring; and an electronic monitoring circuit ( 100 ) that has a variably operable reference circuit ( 150 ) responsive to an input register ( 155 ) and having an output, comparison circuitry ( 110 ) having plural outputs and having a first input coupled to the output of said variably operable reference circuit ( 150 ) and a set of second inputs each second input coupled to a respective one of said power grid points ( 30 .i ); and an output register ( 120 ) having at least two register bit cells ( 120 .i ) respectively fed by the plural outputs of said comparison circuitry ( 110 .i ). Other integrated circuits, and processes of testing and of manufacturing are also disclosed.

First claim

What is claimed is:

1. An integrated circuit comprising:
a functional circuit having power grid points; and
an electronic monitoring circuit including
an analog reference;
an input circuit having a first input coupled to at least one of said power grid points and having a second input at least sometimes fed by said analog reference;
an analog to digital converter circuit fed by said input circuit, said analog to digital converter producing an output; and
a multi-bit output interface fed from said analog to digital converter.

2. The integrated circuit claimed in claim 1 wherein said input circuit is structured to provide an output as a function of the difference of voltages at its first and second inputs.

3. The integrated circuit claimed in claim 1 further comprising an input multiplexer circuit having inputs coupled respectively to at least some of said power grid points and an output coupled to the first input of said input circuit.

4. The integrated circuit claimed in claim 3 further comprising a control circuit coupled to operate said input multiplexer circuit to progressively select power grid points at least one at a time.

5. The integrated circuit claimed in claim 3 wherein said input multiplexer circuit also has an input for said analog reference and has a second output, said input multiplexer circuit coupled via the two outputs to feed selected inputs pairwise to the first and second inputs of said input circuit.

6. The integrated circuit claimed in claim 3 wherein said multi-bit output interface includes at least one statistics circuit and an output multiplexer coupling said analog to digital converter circuit to said multi-bit output interface.

7. The integrated circuit claimed in claim 3 further comprising an output multiplexer coupling said analog to digital converter circuit to said multi-bit output interface, and a control circuit coupled to operate said input multiplexer circuit and said output multiplexer circuit in coordination with each other.

8. The integrated circuit claimed in claim 1 wherein said multi-bit output interface includes an output multiplexer.

9. An integrated circuit comprising:
a functional circuit having power grid points; and
an electronic monitoring circuit including
an analog reference;
an input circuit having a first input coupled to at least one of said power grid points and having a second input at least sometimes fed by said analog reference, wherein said input circuit is structured to provide an output as a function of the difference of voltages at its first and second inputs;
an analog to digital converter circuit fed by said input circuit, said analog to digital converter producing an output; and
a multi-bit output interface fed from said analog to digital converter.

10. The integrated circuit claimed in claim 9 further comprising an input multiplexer circuit having inputs coupled respectively to at least some of said power grid points and an output coupled to the first input of said input circuit.

11. The integrated circuit claimed in claim 10 further comprising a control circuit coupled to operate said input multiplexer circuit to progressively select power grid points at least one at a time.

12. The integrated circuit claimed in claim 10 wherein said input multiplexer circuit also has an input for said analog reference and has a second output, said input multiplexer circuit coupled via the two outputs to feed selected inputs pairwise to the first and second inputs of said input circuit.

13. The integrated circuit claimed in claim 10 wherein said multi-bit output interface includes at least one statistics circuit and an output multiplexer coupling said analog to digital converter circuit to said multi-bit output interface.

14. An integrated circuit comprising:
a functional circuit having power grid points; and
an electronic monitoring circuit including
an analog reference;
an operational amplifier having a first input and a second input, the first input coupled to at least one of said power grid points, and the second input at least sometimes fed by said analog reference;

an input multiplexer circuit having inputs coupled respectively to at least some of said power grid points and an output coupled to the first input of said operational amplifier;
an analog to digital converter circuit fed by said input circuit, said analog to digital converter producing an output; and
a multi-bit output interface fed from said analog to digital converter.

15. The integrated circuit claimed in claim 14 wherein said operational amplifier is structured to provide an output as a function of the difference of voltages at its first and second inputs.

16. The integrated circuit claimed in claim 14 further comprising a control circuit coupled to operate said input multiplexer circuit to progressively select power grid points at least one at a time.

17. The integrated circuit claimed in claim 14 wherein said input multiplexer circuit also has an input for said analog reference and has a second output, said input multiplexer circuit coupled via the two outputs to feed selected inputs pairwise to the first and second inputs of said operational amplifier.

Assignees

• Texas Instruments Inc

Inventors

• Narayanan Prakash
• Polarouthu Sudhir

Classifications

• G01R31/3181

  Functional testing (G01R31/3177 takes precedence) · CPC title

• G01R31/318516

  Test of programmable logic devices [PLDs] · CPC title

• G01R31/3004 Primary

  Current or voltage test · CPC title

• G01R19/257 Primary

  using analogue/digital converters of the type with comparison of different reference values with the value of voltage or current, e.g. using step-by-step method · CPC title