Stacked-die MEMS resonator system

Patent metadata

Field	Value
Publication number	US-9821998-B2
Application number	US-201615187748-A
Country	US
Kind code	B2
Filing date	Jun 20, 2016
Priority date	Jun 15, 2006
Publication date	Nov 21, 2017
Grant date	Nov 21, 2017

Abstract

In a microelectromechanical system (MEMS) device, a CMOS die is affixed to a die-mounting surface and wire-bonded to electrically conductive leads, and a MEMS die is stacked on and electrically coupled to the CMOS die in a flip-chip configuration. A package enclosure envelopes the MEMS die, CMOS die and wire bonds, and exposes respective regions of the electrically conductive leads.

First claim

What is claimed is:

1. A microelectromechanical system (MEMS) device comprising:
a die-mounting surface;
electrically conductive leads;
a CMOS die affixed to the die-mounting surface;
wire bonds that extend from the CMOS die to the electrically conductive leads, respectively;
a MEMS die stacked on and electrically coupled to the CMOS die in a flip-chip configuration;
a package enclosure that envelopes the MEMS die, CMOS die and wire bonds and has an exterior surface at which respective regions of the electrically conductive leads are exposed; and
wherein the MEMS die comprises a resonant MEMS structure and wherein the CMOS die comprises circuitry to sense an electrical signal generated by motion of the resonant MEMS structure.

2. The MEMS device of claim 1 wherein the die-mounting surface comprises a lead frame and wherein the electrically conductive leads are fabricated as constituent members of the lead frame.

3. The MEMS device of claim 1 wherein the die-mounting surface comprises a first substantially planar surface of a die-attach paddle, the die-attach paddle having a second substantially planar surface at least partially exposed at the exterior surface of the package enclosure.

4. The MEMS device of claim 1 wherein the CMOS die comprises opposing first and second faces and wherein (i) the first face of the CMOS die is adhered to the die-mounting surface to affix the CMOS die to the die-mounting surface, (ii) the MEMS die is stacked on the second face of the CMOS die, and (iii) the wire bonds extend from the electrically conductive leads to respective contact points on the second face of the CMOS die.

5. The MEMS device of claim 1 wherein the CMOS die further comprises circuitry to compensate for temperature sensitivity of the resonant MEMS structure.

6. The MEMS device of claim 1 wherein at least one of the MEMS die and CMOS die comprises conductive flip-chip bumps soldered respectively to counterpart conductive contacts on the other of the MEMS die and CMOS die to establish the electrical coupling between the CMOS die and MEMS die.

7. The MEMS device of claim 1 further comprising an electrically-insulating passivation layer disposed between the MEMS die and CMOS die, the passivation layer having a plurality of apertures through which the MEMS die is electrically coupled to the CMOS die.

8. The MEMS device of claim 1 wherein the CMOS die is affixed to the die-mounting surface by at least one of a thermally-conductive adhesive or an electrically-conductive adhesive.

9. The MEMS device of claim 1 wherein the package enclosure comprises a molding compound that envelopes the MEMS die, CMOS die and wire bonds.

10. A method of fabricating a microelectromechanical system (MEMS) device having a CMOS die and a MEMS die, the method comprising:
fabricating a resonant MEMS structure within the MEMS die and fabricating circuitry within the CMOS die to sense an electrical signal generated by motion of the resonant MEMS structure;
affixing the CMOS die to a die-mounting surface;
wire-bonding electrically conductive package leads to the CMOS die;
stacking the MEMS die on and electrically coupling the MEMS die to the CMOS die in a flip-chip configuration; and
enveloping the MEMS die, CMOS die and wire-bonding within a package enclosure having an exterior surface at which respective regions of the electrically conductive leads are exposed.

11. The method of claim 10 wherein the die-mounting surface comprises a lead frame, the method further comprising fabricating the electrically conductive leads as constituent members of the lead frame.

12. The method of claim 10 wherein affixing the CMOS die to the die-mounting surface comprises affixing the CMOS die to a substantially planar first surface of a die-attach paddle that also has a substantially planar second surface, and wherein enveloping the MEMS die, CMOS die and wire bonds within the package enclosure comprises enveloping the first surface of the die-attach paddle within the package enclosure while at least partly exposing the second surface of the die-attach paddle at the exterior surface of the package enclosure.

13. The method of claim 10 wherein the CMOS die comprises opposing first and second faces and wherein (i) affixing the CMOS die to the die-mounting surface comprises adhering the first face of the CMOS die is adhered to the die-mounting surface, (ii) stacking the MEMS die on the CMOS die comprises stacking the MEMS die is stacked on the second face of the CMOS die, and (iii) wire-bonding the electrically conductive package leads to the CMOS die comprises wire-bonding the electrically conductive leads to respective contact points on the second face of the CMOS die.

14. The method of claim 10 further comprising fabricating within the CMOS die circuitry to compensate for temperature sensitivity of the resonant MEMS structure.

15. The method of claim 10 wherein stacking the MEMS die on and electrically coupling the MEMS die to the CMOS die in the flip-chip configuration comprises soldering conductive flip-chip bumps disposed on at least one of the MEMS die and CMOS die to respective counterpart conductive contacts on the other of the MEMS die and CMOS die.

16. The method of claim 10 further comprising disposing an electrically-insulating passivation layer between the MEMS die and CMOS die, the passivation layer having a plurality of apertures through which the MEMS die is electrically coupled to the CMOS die.

17. The method of claim 10 wherein affixing the CMOS die the die-mounting surface comprises affixing the CMOS die to the die-mounting surface using at least one of a thermally-conductive adhesive or an electrically-conductive adhesive.

18. The method of claim 10 wherein enveloping the MEMS die, CMOS die and wire bonds within a package enclosure comprises enveloping the MEMS die, CMOS die and wire-bonding within a molding compound.

Assignees

• Sitime Corp
• SiTime Corpoaration

Inventors

• Gupta Pavan
• Partridge Aaron
• Lutz Markus

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title