Area and power efficient switchable supply network for powering multiple digital islands

US9819189B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9819189-B2
Application numberUS-201514843983-A
CountryUS
Kind codeB2
Filing dateSep 2, 2015
Priority dateSep 2, 2015
Publication dateNov 14, 2017
Grant dateNov 14, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A switchable supply network for powering multiple digital islands. In one embodiment, a first digital island includes a first power collapsible circuit and a first retention circuit, and a second digital island includes a second power collapsible circuit and a second retention circuit. In a normal mode of operation, the first digital island is provided a first supply voltage and a second digital island is provided a second supply voltage higher than the first supply voltage. In a transition mode the second power collapsible circuit is powered down and the second supply voltage is lowered and provided to the second retention circuit. When the second supply voltage falls below the first supply voltage, the first power collapsible circuit is powered down. The second supply voltage is now provided only to the retention circuits, and is furthered lowered in a retention mode to a final retention voltage.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: coupling an output port of a first voltage regulator to a first power collapsible circuit and a first retention circuit to provide a first supply voltage; coupling an output port of a second voltage regulator to a second power collapsible circuit and a second retention circuit to provide a second supply voltage greater than the first supply voltage; de-coupling the output port of the second voltage regulator from the second power collapsible circuit; coupling the output port of the second voltage regulator to the second retention circuit to provide a supply voltage; lowering the supply voltage; and comparing the first supply voltage to the supply voltage as the supply voltage is lowered. 2. The method of claim 1 , further comprising: in response to the comparing indicating that the supply voltage is below the first supply voltage, de-coupling the output port of the first voltage regulator from the first power collapsible circuit and the first retention circuit, and coupling the output port of the second voltage regulator to the first retention circuit to provide the supply voltage to the first retention circuit. 3. The method of claim 2 , further comprising: lowering the supply voltage to a retention voltage. 4. The method of claim 1 , wherein the coupling the output port of the first voltage regulator comprises switching ON a first switch and switching ON a second switch to couple the output port of the first voltage regulator to the first power collapsible circuit and the first retention circuit; the coupling the output port of the second voltage regulator comprises switching ON a third switch and switching ON a fourth switch to couple the output port of the second voltage regulator to the second power collapsible circuit and the second retention circuit; the de-coupling the output port of the second voltage regulator from the second power collapsible circuit comprises switching OFF the third and fourth switches; and the coupling the output port of the second voltage regulator to the second retention circuit comprises switching ON a fifth switch. 5. The method of claim 4 , wherein in response to the comparing indicating that the supply voltage is below the first supply voltage, de-coupling the output port of the first voltage regulator from the first power collapsible circuit and the first retention circuit by switching OFF the first and second switches, and coupling the output port of the second voltage regulator to the first retention circuit to provide the supply voltage to the first retention circuit by switching ON a sixth switch. 6. The method of claim 5 , further comprising: lowering the supply voltage to a retention voltage. 7. The method of claim 5 , wherein the first and second switches are serially connected to each other; the third and fourth switches are serially connected to each other; and the fifth and sixth switches are serially connected to each other. 8. A circuit comprising: a first voltage regulator to provide a first supply voltage; a second voltage regulator to provide a second supply voltage and a supply voltage, the second supply voltage greater than the first supply voltage; a first power collapsible circuit; a first retention circuit; a second power collapsible circuit; a second retention circuit; a comparator; and a controller coupled to the first voltage regulator, the second voltage regulator, and the comparator, the controller to: during a normal mode, couple the first voltage regulator to the first power collapsible circuit and the first retention circuit to provide the first supply voltage, and couple the second voltage regulator to the second power collapsible circuit and the second retention circuit to provide the second supply voltage; and during a transition mode, de-couple the second voltage regulator from the second power collapsible circuit, couple the second voltage regulator to the second retention circuit to provide the supply voltage and to lower the supply voltage, and configure the comparator to compare the first supply voltage to the supply voltage as the supply voltage is lowered. 9. The circuit of claim 8 , wherein the controller, in response to the supply voltage falling below the first supply voltage, enters a retention mode to de-couple the first voltage regulator from the first power collapsible circuit and the first retention circuit, and couple the second voltage regulator to the first retention circuit to provide the supply voltage to the first retention circuit. 10. The circuit of claim 9 , wherein during the retention mode, the controller lowers the supply voltage to a retention voltage. 11. The circuit of claim 8 , further comprising: a first switch to couple the first voltage regulator to the first power collapsible circuit; a second switch to couple the first voltage regulator to the first retention circuit; a third switch to couple the second voltage regulator to the second power collapsible circuit; a fourth switch to couple the second voltage regulator to the second retention circuit; and a fifth switch to couple the second voltage regulator to the second retention circuit; wherein the controller, during the normal mode, switches ON the first switch and the switches ON the second switch to couple the first voltage regulator to the first power collapsible circuit and the first retention circuit, and switches ON the third switch and switches ON the fourth switch to couple the second voltage regulator to the second power collapsible circuit and the second retention circuit; and wherein the controller, during the transition mode, switches OFF the third switch and switches OFF the fourth switch to de-couple the second voltage regulator from the second power collapsible circuit, and switches ON the fifth switch to couple the second voltage regulator to the second retention circuit. 12. The circuit of claim 11 , further comprising: a sixth switch to couple the second voltage regulator to the first retention circuit; wherein the controller, in response to the comparator indicating that the supply voltage is below the first supply voltage during the transition mode, enters the retention mode and switches OFF the first switch and switches OFF the second switch to de-couple the first voltage regulator from the first power collapsible circuit and the first retention circuit, and switches ON the sixth switch to couple the second voltage regulator to the first retention circuit to provide the supply voltage to the first retention circuit. 13. The circuit of claim 12 , wherein the controller, during the retention mode, lowers the supply voltage to a retention voltage. 14. The circuit of claim 12 , wherein the first and second switches are serially connected to each other; the third and fourth switches are serially connected to each other; and the fifth and sixth switches are serially connected to each other. 15. A circuit comprising: a first voltage regulator having an output port; a first power collapsible circuit; a first retention circuit; a second voltage regulator having an output port; a second power collapsible circuit; a second retention circuit; means for coupling the output port of the first voltage regulator to the first power collapsible circuit and the first retention circuit to provide a first supply voltage; means for coupling the output port of the second voltage regulator to the second power collapsible circuit and the second retention circuit to provide a second supply voltage greater than the first supply voltage; means for de-coup

Assignees

Inventors

Classifications

  • H02J3/38Primary

    Arrangements for feeding a single network from two or more generators or sources in parallel; Arrangements for feeding already energised networks from additional generators or sources in parallel · CPC title

  • G06F1/3287Primary

    by switching off individual functional units in the computer system · CPC title

  • Arrangements for the handling of islanding, e.g. for disconnection or for avoiding the disconnection of power · CPC title

  • by using a control or a clock signal, e.g. in order to apply power supply · CPC title

  • Electricity · mapped topic

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What does patent US9819189B2 cover?
A switchable supply network for powering multiple digital islands. In one embodiment, a first digital island includes a first power collapsible circuit and a first retention circuit, and a second digital island includes a second power collapsible circuit and a second retention circuit. In a normal mode of operation, the first digital island is provided a first supply voltage and a second digita…
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H02J3/38. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).