Semiconductor device and method of forming build-up interconnect structures over a temporary substrate

Patent metadata

Field	Value
Publication number	US-9818734-B2
Application number	US-201514624136-A
Country	US
Kind code	B2
Filing date	Feb 17, 2015
Priority date	Sep 14, 2012
Publication date	Nov 14, 2017
Grant date	Nov 14, 2017

Abstract

A semiconductor device has a first build-up interconnect structure formed over a substrate. The first build-up interconnect structure includes an insulating layer and conductive layer formed over the insulating layer. A vertical interconnect structure and semiconductor die are disposed over the first build-up interconnect structure. The semiconductor die, first build-up interconnect structure, and substrate are disposed over a carrier. An encapsulant is deposited over the semiconductor die, first build-up interconnect structure, and substrate. A second build-up interconnect structure is formed over the encapsulant. The second build-up interconnect structure electrically connects to the first build-up interconnect structure through the vertical interconnect structure. The substrate provides structural support and prevents warpage during formation of the first and second build-up interconnect structures. The substrate is removed after forming the second build-up interconnect structure. A portion of the insulating layer is removed exposing the conductive layer for electrical interconnect with subsequently stacked semiconductor devices.

First claim

What is claimed:

1. A method of making a semiconductor device, comprising:
providing a substrate;
forming a first interconnect structure over the substrate;
disposing a first semiconductor die over the first interconnect structure;
disposing the substrate over a carrier with the first semiconductor die between the carrier and substrate;
depositing an encapsulant over the carrier, first semiconductor die, and substrate;
forming a second interconnect structure over the encapsulant and first semiconductor die with the first semiconductor die between the first interconnect structure and second interconnect structure; and
removing the substrate to expose the first interconnect structure and encapsulant after forming the second interconnect structure.

2. The method of claim 1 , further including forming a conductive column over the substrate with the first semiconductor die within a height of the conductive column.

3. The method of claim 2 , wherein the height of the conductive column is less than a height of the first semiconductor die.

4. The method of claim 1 , further including forming a shielding layer within the first interconnect structure or second interconnect structure.

5. The method of claim 1 , wherein forming the second interconnect structure includes depositing an insulating layer directly on the encapsulant.

6. The method of claim 1 , wherein removing the substrate includes using a grinding operation to completely remove the substrate.

7. The method of claim 1 , further including singulating the substrate before disposing the substrate over the carrier.

8. The method of claim 2 , wherein the conductive column extends from the first interconnect structure to the second interconnect structure.

9. A method of making a semiconductor device, comprising:
providing a substrate;
forming a first interconnect structure over the substrate;
disposing a semiconductor die over the first interconnect structure;
singulating the substrate;
forming a second interconnect structure over the semiconductor die with the semiconductor die between the first interconnect structure and second interconnect structure; and
removing the substrate to expose the first interconnect structure after forming the second interconnect structure over the semiconductor die.

10. The method of claim 9 , further including forming a vertical interconnect structure over the substrate.

11. The method of claim 9 , wherein forming the first interconnect structure includes:
forming an insulating layer over the substrate; and
forming a conductive layer over the insulating layer.

12. The method of claim 11 , further including removing a portion of the insulating layer after removing the substrate.

13. The method of claim 9 , further including forming a grounding layer or shielding layer within the first interconnect structure or second interconnect structure.

14. The method of claim 9 , further including disposing an encapsulant over a side surface of the first interconnect structure.

15. A method of making a semiconductor device, comprising:
providing a substrate;
forming a first interconnect structure over the substrate;
disposing a first semiconductor die over the first interconnect structure;
disposing the substrate over a carrier with the first semiconductor die between the substrate and carrier;
depositing an encapsulant around the first semiconductor die and substrate between the substrate and carrier; and
forming a second interconnect structure on the encapsulant.

16. The method of claim 15 , further including removing the substrate after forming the second interconnect structure.

17. The method of claim 15 , wherein the substrate includes silicon.

18. The method of claim 15 , further including forming a vertical interconnect structure over the first interconnect structure.

19. The method of claim 15 , wherein forming the first interconnect structure includes:
forming an insulating layer over the substrate; and
forming a conductive layer over the insulating layer.

20. The method of claim 19 , further including removing a portion of the insulating layer after removing the substrate.

21. The method of claim 15 , further including disposing a second semiconductor die over the first interconnect structure.

22. A semiconductor device, comprising:
a substrate;
a first interconnect structure formed on a first surface of the substrate;
a first semiconductor die disposed over the first interconnect structure with an active surface of the first semiconductor die oriented away from the substrate;
an encapsulant disposed over the first semiconductor die, wherein the encapsulant covers the first surface of the substrate and a second surface of the substrate opposite the first surface;
a second interconnect structure formed over the encapsulant with the first semiconductor die between the first interconnect structure and second interconnect structure; and
a conductive pillar disposed in the encapsulant outside a footprint of the first semiconductor die and extending from the first interconnect structure to the second interconnect structure.

23. The semiconductor device of claim 22 , further including a second semiconductor die disposed over the first interconnect structure.

24. The semiconductor device of claim 22 , wherein the substrate includes silicon.

25. The semiconductor device of claim 22 , wherein the second interconnect structure contacts a contact pad of the first semiconductor die and the conductive pillar.

Assignees

• Stats Chippac Ltd
• Stats Chippac Pte Ltd

Inventors

• Lin Yaojian
• Chen Kang

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W70/099

  Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers · CPC title

• H10W72/072

  of bump connectors · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title