Substrate treating method and treatment liquid
US-2024339317-A1 · Oct 10, 2024 · US
Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
US9818627B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9818627-B2 |
| Application number | US-201715408554-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 18, 2017 |
| Priority date | Jan 18, 2013 |
| Publication date | Nov 14, 2017 |
| Grant date | Nov 14, 2017 |
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- Title
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Abstract
Official abstract text for this publication.
A manufacturing method of a semiconductor device according to the present invention comprises cleaning a semiconductor substrate. A first chemical liquid for forming a water-repellent protection film and a second chemical liquid coating the first chemical liquid are supplied on a surface of the semiconductor substrate. Alternatively, the semiconductor substrate is immersed in the first chemical liquid coated with the second chemical liquid. The semiconductor substrate is then dried.
First claim
Opening claim text (preview).
The invention claimed is: 1. A semiconductor manufacturing apparatus comprising: a cleaning-liquid supply part supplying a cleaning liquid cleaning a semiconductor substrate to a surface of the semiconductor substrate; and a chemical-liquid supply part supplying a first chemical liquid for forming a water-repellent protection film and a second chemical liquid coating the first chemical liquid on the surface of the semiconductor substrate without mixing with the first chemical liquid, wherein the chemical-liquid supply part has a double piping structure comprising a first pipe supplying the first chemical liquid and a second pipe supplying the second chemical liquid, wherein the second pipe is provided to surround an outer circumference of the first pipe. 2. The apparatus of claim 1 , wherein the chemical-liquid supply part simultaneously supplies the first chemical liquid and the second chemical liquid on the surface of the semiconductor substrate. 3. The apparatus of claim 1 , wherein the chemical-liquid supply part simultaneously supplies the first chemical liquid and the second chemical liquid on the surface of the semiconductor substrate. 4. The apparatus of claim 1 , wherein the chemical-liquid supply part supplies the second chemical liquid on the surface of the semiconductor substrate after supplying the first chemical liquid. 5. The apparatus of claim 1 , wherein the chemical-liquid supply part supplies the second chemical liquid on the surface of the semiconductor substrate after supplying the first chemical liquid. 6. The apparatus of claim 1 , wherein the first chemical liquid is a soluble water-repellent agent and the second chemical liquid is an insoluble chemical liquid, or the first chemical liquid is an insoluble water-repellent agent and the second chemical liquid is a soluble chemical liquid. 7. The apparatus of claim 1 , wherein a specific gravity of the second chemical liquid is lower than a specific gravity of the first chemical liquid. 8. The apparatus of claim 1 , wherein a specific gravity of the second chemical liquid is lower than a specific gravity of the first chemical liquid.
Assignees
Inventors
Classifications
Apparatus for applying a liquid, a resin, an ink or the like · CPC title
with the semiconductor substrates being dipped in baths or vessels · CPC title
for cleaning followed by drying, rinsing, stripping, blasting or the like · CPC title
- H10P70/20Primary
Cleaning during device manufacture · CPC title
- H10P72/0414Primary
using mainly spraying means, e.g. nozzles · CPC title
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- What does patent US9818627B2 cover?
- A manufacturing method of a semiconductor device according to the present invention comprises cleaning a semiconductor substrate. A first chemical liquid for forming a water-repellent protection film and a second chemical liquid coating the first chemical liquid are supplied on a surface of the semiconductor substrate. Alternatively, the semiconductor substrate is immersed in the first chemical…
- Who is the assignee on this patent?
- Toshiba Memory Corp
- What technology area does this patent fall under?
- Primary CPC classification H10P70/20. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).