Read threshold voltage adaptation using bit error rates based on decoded data

Patent metadata

Field	Value
Publication number	US-9818488-B2
Application number	US-201514928284-A
Country	US
Kind code	B2
Filing date	Oct 30, 2015
Priority date	Oct 30, 2015
Publication date	Nov 14, 2017
Grant date	Nov 14, 2017

Abstract

A read threshold voltage for a memory is adjusted based on a bit error rate based on decoded data for a plurality of read threshold voltages. The read threshold voltage can be adjusted by reading the memory at a current read threshold voltage to obtain a read value; applying a hard decision decoder to the read value; determining if the hard decision decoder converges for the read value to a converged word; storing bits corresponding to the converged word as reference bits and, if the hard decision decoder converges, (i) computing a bit error rate for the current read threshold voltage based on the reference bits; (ii) adjusting the current read reference voltage to a new read threshold voltage; and (iii) reading the memory at the new read threshold voltage to obtain a new read value, until a threshold is satisfied; and once the threshold is satisfied, selecting the read threshold voltage based on the bit error rates.

First claim

What is claimed is:

1. A device comprising:
a controller configured to adjust a read threshold voltage for one or more pages of a memory based on a syndrome weight for a plurality of read threshold voltages until decoded data is available from a decoder to calculate a bit error rate based on the decoded data.

2. The device of claim 1 , wherein the controller adjusts the read threshold voltage by:
reading the memory at a current read threshold voltage to obtain a read value;
applying a hard decision decoder to the read value;
determining if the hard decision decoder converges for the read value to a converged word to provide the available decoded data;
storing one or more bits corresponding to the converged word as reference bits; and
selecting the read threshold voltage based on one or more bit error rates.

3. The device of claim 2 , wherein the controller performs the following steps if the hard decision decoder converges for the read value to provide the available decoded data:
computing a bit error rate for the current read threshold voltage based on the reference bits;
adjusting a current read reference voltage to a new read threshold voltage;
reading the memory at the new read threshold voltage to obtain a new read value;
repeating the computing, adjusting and reading steps until a threshold is satisfied for a number of read threshold voltages attempted; and
once the threshold is satisfied, selecting the read threshold voltage based on the bit error rates computed for each repeated step.

4. The device of claim 3 , wherein the controller estimates the bit error rate from the syndrome weight if the hard decision decoder does not converge for the current read threshold voltage and adjusts the current read reference voltage to the new read threshold voltage.

5. The device of claim 2 , wherein the controller determines a count profile based on a number of errors detected in one or more of a number of words read and a number of encoded pages.

6. The device of claim 3 , wherein the controller selects the new read threshold voltage based on one or more of a first bit error rate profile based on the bit error rates associated with the available decoded data for a plurality of the read threshold voltages and a second bit error rate profile based on bit error rates from the syndrome weight for a plurality of the read threshold voltages.

7. The device of claim 6 , wherein the selection of the new read threshold voltage is further based on a count profile based on a number of errors detected in one or more of a number of words read and a number of encoded pages.

8. The device of claim 1 , wherein the controller selects a new read threshold voltage for a next iteration based on one or more of a progression of bit error profiles based on the bit error rates for a plurality of the read threshold voltages, syndrome weight profiles for a plurality of the read threshold voltages, a number of words read at a given read threshold voltage and a number of words processed at a given read threshold voltage.

9. The device of claim 1 , wherein the controller adjusts the read threshold voltage by:
reading the memory at a current read threshold voltage to obtain a read value;
estimating the bit error rate from the syndrome weight, wherein the syndrome weight is obtained from one or more of a syndrome weight calculator and a hard decision decoder for a specified number of iterations; and
selecting a new read threshold voltage based on a second bit error rate profile based on the bit error rate from the syndrome weight for a plurality of the read threshold voltages.

10. A tangible machine-readable recordable storage medium, wherein one or more software programs when executed by one or more processing devices implement the following step:
adjust a read threshold voltage for one or more pages of a memory based on a syndrome weight for a plurality of read threshold voltages until decoded data is available from a decoder to calculate a bit error rate based on the decoded data.

11. The storage medium of claim 10 , wherein the read threshold voltage is adjusted by performing the following steps:
reading the memory at a current read threshold voltage to obtain a read value;
applying a hard decision decoder to the read value;
determining if the hard decision decoder converges for the read value to a converged word to provide the available decoded data;
storing one or more bits corresponding to the converged word as reference bits and performing the following steps if the hard decision decoder converges for the read value to provide the available decoded data:
computing a bit error rate for the current read threshold voltage based on the reference bits;
adjusting the current read reference voltage to a new read threshold voltage;
reading the memory at the new read threshold voltage to obtain a new read value;
repeating the computing, adjusting and reading steps until a threshold is satisfied for a number of read threshold voltages attempted; and
once the threshold is satisfied, selecting the read threshold voltage based on the bit error rates computed for each repeated step.

12. The storage medium of claim 11 , further comprising the step of selecting the new read threshold voltage based on one or more of a first bit error rate profile based on the bit error rates associated with the available decoded data for a plurality of the read threshold voltages and a second bit error rate profile based on bit error rates from the syndrome weight for a plurality of the read threshold voltages.

13. A method, comprising:
obtaining a bit error rate based on a syndrome weight for a plurality of read threshold voltages until decoded data is available from a decoder to calculate a bit error rate based on the decoded data;
adjusting a read threshold voltage for a memory based on the bit error rate.

14. The method of claim 13 , wherein the read threshold voltage is adjusted by performing the following steps:
reading the memory at a current read threshold voltage to obtain a read value;
applying a hard decision decoder to the read value;
determining if the hard decision decoder converges for the read value to a converged word to provide the available decoded data;
storing one or more bits corresponding to the converged word as reference bits; and
selecting the read threshold voltage based on one or more bit error rates.

15. The method of claim 14 , further comprising the following steps if the hard decision decoder converges for the read value to provide the available decoded data:
computing a bit error rate for the current read threshold voltage based on the reference bits;
adjusting the current read reference voltage to a new read threshold voltage;
reading the memory at the new read threshold voltage to obtain a new read value;
repeating the computing, adjusting and reading steps until a threshold is satisfied for a number of read threshold voltages attempted; and
once the threshold is satisfied, selecting the read threshold voltage based on the bit error rates computed for each repeated step.

16. The method of claim 15 , further comprising the step of estimating the bit error rate from the syndrome weight if the hard decision decoder does not converge for the current read threshold voltage and adjusts the current read reference voltage to the new read threshold voltage.

17. The method of claim 15 , further comprising the step of determining a count profile based on a number of errors detected in one or more of a number of words read and a number of encoded pages.

Assignees

• Seagate Technology Llc

Inventors

• Sankaranarayanan Sundararajan
• Alhussien Abdelhakim Salem
• Chen Zhengang
• Haratsch Erich F

Classifications

• G06F11/079

  Root cause analysis, i.e. error or fault diagnosis (in a hardware test environment G06F11/22; in a software test environment G06F11/36) · CPC title

• G06F11/076

  by exceeding a count or rate limit, e.g. word- or bit count limit · CPC title

• G06F11/0793

  Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40) · CPC title

• G06F11/0727

  in a storage system, e.g. in a DASD or network based storage system (drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097) · CPC title

• G11C16/0483

  comprising cells having several storage transistors connected in series · CPC title