Planar cavity MEMS and related structures, methods of manufacture and design structures

Patent metadata

Field	Value
Publication number	US-9815690-B2
Application number	US-201615212888-A
Country	US
Kind code	B2
Filing date	Jul 18, 2016
Priority date	Jun 25, 2010
Publication date	Nov 14, 2017
Grant date	Nov 14, 2017

Abstract

A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a beam structure and an electrode on an insulator layer, remote from the beam structure. The method further includes forming at least one sacrificial layer over the beam structure, and remote from the electrode. The method further includes forming a lid structure over the at least one sacrificial layer and the electrode. The method further includes providing simultaneously a vent hole through the lid structure to expose the sacrificial layer and to form a partial via over the electrode. The method further includes venting the sacrificial layer to form a cavity. The method further includes sealing the vent hole with material. The method further includes forming a final via in the lid structure to the electrode, through the partial via.

First claim

What is claimed:

1. A method of forming at least one Micro-Electro-Mechanical System (MEMS), comprising:
forming a first sacrificial layer over discrete wires;
forming a beam over the first sacrificial layer;
forming an insulator layer on the first sacrificial layer;
forming a cavity via in the insulator layer, exposing a portion of the first sacrificial layer;
forming an electrode on the insulator layer;
forming a second sacrificial layer over the beam and in the cavity via;
forming a lid material over the second sacrificial layer and the electrode;
providing simultaneously a vent hole in the lid material to expose at least the second sacrificial layer and to form a partial via over the electrode;
venting the first sacrificial layer and the second sacrificial layer to form at least a lower cavity and an upper cavity, respectively;
sealing the vent hole with material; and
forming a final via through the lid material by etching the lid through the partial via, to the electrode,
wherein the partial via and the final via are formed by two separate patterning and etching steps, and
the two separate patterning and etching steps reduces an etching time to expose the electrode.

2. The method of claim 1 , wherein the material includes dielectric material and a nitride cap.

3. The method of claim 2 , further comprising depositing a polyimide material on the nitride cap.

4. The method of claim 1 , wherein the two separate patterning and etching steps forms a tapered angle of the final via.

5. The method of claim 1 , wherein the beam and upper cavity are remote from the electrode.

6. The method of claim 1 , wherein the vent hole is rounded or chamfered.

7. The method of claim 1 , wherein the vent hole is octagonal.

8. A method of forming at least one Micro-Electro-Mechanical System (MEMS), comprising:
forming a first sacrificial layer over discrete wires;
forming a beam over the first sacrificial layer;
forming an insulator layer on the first sacrificial layer;
forming a cavity via in the insulator layer, exposing a portion of the first sacrificial layer;
forming an electrode on the insulator layer;
forming a second sacrificial layer over the beam and in the cavity via;
forming a lid material over the second sacrificial layer and the electrode;
providing simultaneously a vent hole in the lid material to expose at least the second sacrificial layer and to form a partial via over the electrode;
venting the first sacrificial layer and the second sacrificial layer to form at least a lower cavity and an upper cavity, respectively;
sealing the vent hole with material; and
forming a final via through the lid material by etching the lid through the partial via, to the electrode,
wherein the partial via and the final via are formed by two separate patterning and etching steps, and
the vent hole is provided greater than 5 microns away from both the partial via and the final via.

9. A method of forming at least one Micro-Electro-Mechanical System (MEMS), comprising:
forming a first sacrificial layer over discrete wires;
forming a beam over the first sacrificial layer;
forming an insulator layer on the first sacrificial layer;
forming a cavity via in the insulator layer, exposing a portion of the first sacrificial layer;
forming an electrode on the insulator layer;
forming a second sacrificial layer over the beam and in the cavity via;
forming a lid material over the second sacrificial layer and the electrode;
providing simultaneously a vent hole in the lid material to expose at least the second sacrificial layer and to form a partial via over the electrode;
venting the first sacrificial layer and the second sacrificial layer to form at least a lower cavity and an upper cavity, respectively;
sealing the vent hole with material;
forming a final via through the lid material by etching the lid through the partial via, to the electrode; and
depositing a polyimide material on a nitride cap such that a dielectric material, the nitride cap and the polyimide material are all deposited within the partial via.

10. The method of claim 9 , wherein a total height of the partial via and the final via is about 9 microns.

11. The method of claim 9 , wherein the material includes the dielectric material and the nitride cap.

12. The method of claim 3 , wherein the dielectric material, the nitride cap, and the polyimide material are deposited in the partial via.

13. The method of claim 1 , wherein the first sacrificial layer and the second sacrificial layer are vented using a XeF 2 etchant through the vent hole.

Assignees

• IBM

Inventors

• Herrin Russell T
• Maling Jeffrey C
• Stamper Anthony K

Classifications

• Y10S438/937

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• Y10T29/42

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• B81C2203/0136

  Growing or depositing of a covering layer · CPC title

• H01H1/0036

  Switches making use of microelectromechanical systems [MEMS] (for electromagnetic relays H01H50/005; for electrostatic relays H01H59/0009) · CPC title

• Y10T29/49155

  Manufacturing circuit on or in base · CPC title