Self-destructing electronic device

Patent metadata

Field	Value
Publication number	US-9812407-B2
Application number	US-201514869367-A
Country	US
Kind code	B2
Filing date	Sep 29, 2015
Priority date	Sep 29, 2015
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

A self destructing device includes: at least one active electronic region and at least one thermal destruction trigger; at least one chamber enclosed by the semiconducting material, wherein the at least one chamber contains an etchant material, wherein in response to activation of the at least one thermal destruction trigger, the self-destructing device is configured to: generate heat to cause decomposition of at least a first portion of the etchant material; decompose at least a first portion of the etchant material; etch at least a second portion of the second oxide layer provided between the semiconducting material and the at least one chamber at a first temperature; expose the etchant material to the semiconducting material to cause an exothermic reaction generating more heat; enable spread of the exothermic reaction to etch at least a third portion of the first oxide layer and to etch the top layer.

First claim

What is claimed is:

1. A self-destructing device comprising:
a top layer including at least one active electronic region and at least one thermal destruction trigger;
a middle layer including semiconducting material and at least one chamber, wherein the at least one chamber is enclosed by the semiconducting material, wherein the at least one chamber contains an etchant material configured to react in an exothermic manner with the semiconducting material to generate heat;
a first oxide layer provided between the top layer and the middle layer;
a second oxide layer provided between the semiconducting material and the at least one chamber; and
wherein in response to activation of the at least one thermal destruction trigger, the self-destructing device is configured to:
generate heat to cause decomposition of at least a first portion of the etchant material;
decompose at least a first portion of the etchant material to cause etching of the second oxide layer;
etch at least a second portion of the second oxide layer provided between the semiconducting material and the at least one chamber at a first temperature to cause exposure of the etchant material to the semiconducting material;
expose the etchant material to the semiconducting material to cause an exothermic reaction generating more heat;
enable spread of the exothermic reaction to etch at least a third portion of the first oxide layer; and
etch the top layer through at least one void created in the first oxide layer.

2. The self-destructing device of claim 1 , wherein at least one of the first oxide layer and the second oxide layer is composed of silicon oxide.

3. The self-destructing device of claim 1 , wherein the semiconducting material is silicon.

4. The self-destructing device of claim 1 , wherein the etchant material includes at least one of sodium bifluoride and xenon difluoride.

5. The self-destructing device of claim 1 further comprising a bottom cap seal covering at least one opening of the at least one chamber.

6. The self-destructing device of claim 5 , wherein the bottom cap seal includes a material that is not reactive to the etchant material in the middle layer.

7. The self-destructing device of claim 5 , wherein the bottom cap seal includes an oxygen and humidity blocking sheet.

8. The self-destructing device of claim 5 , wherein the bottom cap seal is composed of a material that is configured to etch when the at least one thermal destruction trigger is activated.

9. The self-destructing device of claim 1 , wherein the top layer has a thickness of six microns.

10. The self-destructing device of claim 1 , wherein a first amount of etchant material in the at least one chamber is approximately equal to a second amount of semiconducting material.

11. The self-destructing device of claim 1 , wherein the at least one thermal destruction trigger is adjacent to a respective chamber of the at least one chamber.

12. The self-destructing device of claim 1 , wherein the self-destructing device is a self-destructing electronic chip.

13. A self-destructing chip comprising:
a silicon substrate enclosing at least one chamber containing a combination of sodium bifluoride and xenon difluoride;
at least one active electronics layer provided over a first side of the silicon substrate, the at least one active electronics layer including at least one thermal destruction trigger, the at least one thermal destruction trigger coupled to a voltage source and configured to generate heat when powered;
silicon oxide provided between the silicon substrate and the at least one active electronic layers and between the silicon substrate and the at least one chamber enclosed by the silicon substrate; and
a silicon nitride interface covering at least one opening of the at least one chamber on a second side of the silicon substrate;
wherein in response to activation of the at least one thermal destruction trigger, the self-destructing chip is configured to:
decompose the sodium bifluoride and release hydrogen fluoride at a first temperature to etch the silicon oxide between the silicon substrate and the at least one chamber;
expose xenon dilfluoride to the silicon substrate to destroy the silicon substrate and generate more heat resulting in an exothermic reaction;
etch the silicon oxide between the silicon substrate and the at least one active electronics layer; and
facilitate the spread of the exothermic reaction to etch the at least one active electronics layer.

Assignees

• Honeywell Int Inc

Inventors

• Ridley Jeff A
• Tin Steven
• Kriz Jeffrey James

Classifications

• H10W42/40 Primary

  protecting against tampering, e.g. unauthorised inspection or reverse engineering · CPC title

• H01L23/573 Primary

  Electricity · mapped topic