Chip with shelf life

Patent metadata

Field	Value
Publication number	US-9196591-B2
Application number	US-201414181817-A
Country	US
Kind code	B2
Filing date	Feb 17, 2014
Priority date	Feb 17, 2014
Publication date	Nov 24, 2015
Grant date	Nov 24, 2015

Abstract

A method of forming a semiconductor structure includes forming a recess within a silicon substrate of an IC chip near a circuit of the IC chip. A metal layer is formed in the recess and the IC chip is exposed to an oxygen-containing environment to initiate the oxidation of a portion of the silicon substrate below the metal layer and adjacent to the circuit. The oxidation process consumes the portion of the silicon substrate below the metal layer forming a silicon dioxide layer that damages the circuit and causes the IC chip to be inoperable. The time to oxidize the portion of the silicon substrate below the metal layer and damage the circuit represents the shelf life of the IC chip.

First claim

What is claimed is:

1. A method of forming a semiconductor structure, the method comprising:
forming a recess within a silicon substrate of an integrated circuit (IC) chip, wherein the recess is located near a circuit of the IC chip;
forming a metal layer in a bottom portion of the recess; and
exposing the IC chip to an oxygen-containing environment to initiate an oxidation of a portion of the silicon substrate located below the metal layer in the bottom portion of the recess and above the circuit,
wherein a thickness of the portion of the silicon substrate located below the metal layer in the bottom portion of the recess and above the circuit determines a time for the portion of the silicon substrate to be oxidized and reach the circuit, and
wherein the time for the portion of the silicon substrate to be oxidized corresponds to a shelf life for the IC chip.

2. The method of claim 1 , wherein the circuit is critical for the proper functioning of the IC chip.

3. The method of claim 1 , wherein the oxidation of the portion of the silicon substrate located above the circuit progresses until reaching the circuit.

4. The method of claim 1 , wherein exposing the IC chip to the oxygen-containing environment comprises providing a constant supply of oxygen.

5. The method of claim 4 , wherein the oxygen-containing environment comprises an oxygen-containing fluid such as air.

6. The method of claim 4 , wherein the oxygen-containing environment comprises a closed chamber containing pressurized oxygen.

7. The method of claim 1 , further comprising:
forming a heat sink above the semiconductor substrate prior to exposing the IC chip to the oxygen-containing environment; and
forming recesses in the heat sink to exposed the metal layer.

8. The method of claim 1 , wherein forming the metal layer comprises depositing a layer of a copper-rich material within the recess.

9. The method of claim 8 , wherein the metal layer is deposited in an island-like fashion.

10. The method of claim 8 , wherein copper atoms from the metal layer diffuse to an interface between the portion of the silicon substrate and a layer of silicon dioxide to catalyze the oxidation of the portion of the silicon substrate.

11. The method of claim 1 , wherein exposing the IC chip to the oxygen-containing environment comprises spontaneously growing a layer of silicon dioxide that consumes the portion of the silicon substrate beneath the metal layer.

12. The method of claim 1 , wherein the oxidation of the silicon substrate occurs at ambient conditions of pressure and temperature.

Assignees

• IBM

Inventors

• Leobandung Effendi

Classifications

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6309

  of silicon in uncombined form, i.e. pure silicon · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/877

  Bump connectors and die-attach connectors · CPC title

• H10W70/02

  of conductive package substrates serving as an interconnection, e.g. of metal plates (manufacture or treatment of leadframes H10W70/04) · CPC title