Integrated circuit with configurable on-die termination
US-2024146304-A1 · May 2, 2024 · US
US9806714B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9806714-B2 |
| Application number | US-201414149720-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 7, 2014 |
| Priority date | Jan 7, 2014 |
| Publication date | Oct 31, 2017 |
| Grant date | Oct 31, 2017 |
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Official abstract text for this publication.
In a testing device, a method for implementing automatic RF port testing. The method includes attaching a device under test having a plurality of RF pins to a load board, dynamically tuning a plurality of RF ports of the load board to the plurality of RF pins, and automatically matching the plurality of RF ports to the plurality of RF pins with respect to impedance. The method further includes implementing an RF port testing process on the device under test.
Opening claim text (preview).
What is claimed is: 1. A method for implementing automatic RF port testing in an automated testing equipment, the method comprising: subsequent to a device under test being coupled to a load board of the automated testing equipment, dynamically tuning impedance at a plurality of RF ports of the load board to a plurality of RF pins of the device under test through an impedance matching device, wherein the impedance matching device is an integral component of the load board; automatically matching the plurality of RF ports to the plurality of RF pins with respect to impedance; and implementing an RF port testing process on the device under test. 2. The method of claim 1 further comprising testing a plurality of RF electronics devices simultaneously through the load board. 3. The method of claim 1 , wherein the impedance matching device comprises an RF MEMs impedance matching device. 4. The method of claim 1 , wherein the dynamically tuning at the plurality of RF ports is software controlled and configured. 5. The method of claim 3 , wherein the impedance matching device comprises a tunable impedance matching circuit. 6. The method of claim 1 , wherein the impedance matching device comprises programmable capacitive elements implemented in a CMOS RF MEMs impedance matching structure. 7. A non-transitory computer readable memory having computer readable code which when executed by a processor causes the processor to implement a method for implementing automatic RF port testing, the method comprising: after a device under test is coupled to a load board of an automated testing equipment, dynamically tuning impedance at a plurality of RF ports of the load board to a plurality of RF pins of the device under test through an impedance matching device that is an integral component of the load board; automatically matching the plurality of RF ports to the plurality of RF pins with respect to impedance; and implementing an RF port testing process on the device under test. 8. The non-transitory computer readable memory of claim 7 , wherein the method further comprises testing a plurality of RF electronics devices simultaneously. 9. The non-transitory computer readable memory of claim 7 , wherein the impedance matching device comprises an RF MEMs impedance matching device. 10. The non-transitory computer readable memory of claim 7 , wherein the dynamically tuning at the plurality of RF ports is software controlled and configured. 11. The non-transitory computer readable memory of claim 7 , wherein the impedance matching device comprises a tunable impedance matching circuit. 12. The non-transitory computer readable memory of claim 7 , wherein the impedance matching device comprises programmable capacitive elements implemented in a CMOS RF MEMs impedance matching structure. 13. An automated test system comprising: an RF measurement device; a load board comprising: a plurality of RF ports configured to couple a device under test with the automated test equipment through a plurality of RF pins of the device under test: an impedance matching device coupled to the plurality of RF ports; a processor coupled to the load board; and memory coupled to the processor and comprising instructions that, when executed by the processor, cause the automated test system to implement a method of: dynamically tuning the impedance matching device to automatically match impedance at the plurality of RF ports to the plurality of RF pins; and implementing an RF port testing process on the device under test. 14. The automated test system of claim 13 , wherein the RF measurement device comprises a Vector network analyzer (VNA). 15. The automated test system of claim 13 , wherein the method further comprises testing a plurality of RF electronics devices simultaneously. 16. The automated test system of claim 13 , wherein the impedance matching device comprises an RF MEMs impedance matching device. 17. The automated test system of claim 16 wherein the RF MEMs impedance matching device comprises a tunable impedance matching circuit. 18. The automated test system of claim 16 wherein RF MEMs impedance matching device comprises programmable capacitive elements implemented in a CMOS RF MEMs impedance matching structure.
of microwave or radiofrequency circuits (of attenuation, gain, e.g. using network analyzers G01R27/28) · CPC title
Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736) · CPC title
Modifications of input or output impedance · CPC title
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere ({measuring superconductive properties G01R33/1238;} testing line transmission systems H04B3/46; testing or measuring semiconductors or solid state devices during manufacture {H10P74/00}) · CPC title
Arrangements for measuring frequencies; Arrangements for analysing frequency spectra · CPC title
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