Motor control system and method for input current protection

Patent metadata

Field	Value
Publication number	US-9800139-B2
Application number	US-201414332208-A
Country	US
Kind code	B2
Filing date	Jul 15, 2014
Priority date	Jul 15, 2014
Publication date	Oct 24, 2017
Grant date	Oct 24, 2017

Abstract

A motor control system for adjusting motor speed if a current overload condition occurs. The motor control system may include a motor, a power factor correction (PFC) circuit providing current to the motor, and a signal processor. The PFC circuit may limit current provided to the motor based on an output voltage sensed by the PFC circuit. The signal processor may sense input voltage of the PFC circuit to determine a power limit, then compare sensed or calculated drive power of the motor with the power limit. If the drive power sensed or calculated is greater than the power limit, the signal processor may output a signal for reducing the drive power to the power limit. Limiting the drive power provided to the motor limits or decreases a speed of the motor.

First claim

Having thus described various embodiments of the invention, what is claimed as new and desired to be protected by Letters Patent includes the following:

1. A motor control system for controlling operation of an electric motor, including providing a drive power to the electric motor, the motor control system comprising:
a power factor correction (PFC) circuit having an input for receiving an input voltage and an output electrically coupled to the electric motor, and configured to enter a current limiting mode if the input voltage is below a threshold for providing the drive power to the electric motor; and
a signal processor configured for determining the input voltage of the PFC circuit and the drive power to the electric motor, determining a maximum drive power that is proportional to the input voltage of the PFC circuit and at which the electric motor is driven before the PFC circuit enters the current limiting mode, and limiting the drive power to the maximum drive power to prevent the PFC circuit from entering the current limiting mode.

2. The motor control system of claim 1 , further comprising a rectifier electrically coupled to the PFC circuit, wherein the input voltage is measured by the signal processor at a point after the rectifier and before the PFC circuit.

3. The motor control system of claim 1 , further comprising bus capacitors and an inverter electrically coupled to the PFC circuit, the electric motor, and the signal processor, wherein the electric motor receives the drive power from the inverter, and wherein a signal associated with the maximum drive power is provided from the signal processor to the inverter to limit the drive power to the electric motor to the maximum drive power.

4. The motor control system of claim 1 , wherein the signal processor is a digital signal processing (DSP) control and the DSP control is configured to receive a speed, torque, or flow reference signal from a control interface, wherein the DSP control outputs signals to operate the electric motor at a speed, torque, or flow associated with the speed, torque, or flow reference signal if the drive power to the electric motor is not greater than the maximum drive power.

5. A motor control system comprising:
an electric motor;
a rectifier;
a power factor correction (PFC) circuit having an input for receiving an input voltage from the rectifier and an output electrically coupled to the electric motor; and
a signal processor configured for receiving the input voltage from the input of the PFC circuit, sensing or calculating a drive power to the electric motor, determining a maximum drive power that is proportional to the input voltage and at which the electric motor is driven before the PFC circuit enters a current limiting mode, comparing the drive power of the electric motor with the maximum drive power, and outputting a signal for reducing the drive power to the maximum drive power if the drive power sensed or calculated by the signal processor is greater than the maximum drive power.

6. The motor control system of claim 5 , further comprising bus capacitors and an inverter electrically coupled to the PFC circuit, the electric motor, and the signal processor, wherein the electric motor is configured to receive the drive power from the inverter, and wherein the signal processor is configured to output to the inverter the signal for reducing the drive power to the maximum drive power.

7. The motor control system of claim 5 , wherein limiting the drive power provided to the electric motor comprises limiting or decreasing a speed of the electric motor and thereby decreasing a load of the PFC circuit.

8. The motor control system of claim 5 , wherein the signal processor is a digital signal processing (DSP) control.

9. The motor control of claim 5 , further comprising a control interface, wherein the signal processor is configured to receive a speed, torque, or flow reference signal from the control interface, wherein the signal processor is configured to output signals for operating the electric motor at a speed, torque, or flow associated with the speed, torque, or flow reference signal if the sensed or calculated drive power to the electric motor is not greater than the maximum drive power.

10. A motor control system for controlling operation of an electric motor, including providing a drive power to the electric motor, the motor control system comprising:
a three-phase rectifier configured to convert an alternating current into a direct current;
a power factor correction circuit configured to
receive the direct current from the three-phase rectifier,
enter a current limiting mode if an input voltage to the power factor correction circuit is below a threshold for providing the drive power to the electric motor, and
output a power factor corrected direct current;

an inverter configured to receive the power factor corrected direct current and to output the drive power to the electric motor; and
a digital signal processor configured to
determine the input voltage to the power factor correction circuit,
determine the drive power output by the inverter,
determine a maximum drive power at which the electric motor is driven before the power factor correction circuit enters the current limiting mode, and
if the input voltage is too low to maintain the drive power to drive the electric motor at a specified performance without exceeding the maximum drive power, limit the drive power to the maximum drive power to prevent the power factor correction circuit from entering the current limiting mode.

11. The motor control system of claim 10 , wherein limiting the drive power provided to the electric motor limits or decreases a speed of the electric motor and thereby decreases a load of the PFC circuit.

12. The motor control of claim 10 , further comprising a control interface, wherein the specified performance is a specified speed, and wherein the DSP control is configured to receive a speed reference signal from the control interface, and configured to output signals for operating the electric motor at a speed associated with the speed reference signal if the drive power to the electric motor is not greater than the maximum drive power.

Assignees

• Nidec Motor Corp

Inventors

• Skinner James L
• Shahi Prakash B
• Clark Bret S
• Glenn Douglas D
• Schock Christopher D

Classifications

• Y02B70/126

  Cross-Sectional Technologies · mapped topic

• H02P29/032

  Preventing damage to the motor, e.g. setting individual current limits for different drive conditions · CPC title

• H02M1/32

  Means for protecting converters other than automatic disconnection · CPC title

• H02M1/4216 Primary

  operating from a three-phase input voltage (H02M1/4233 takes precedence) · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title