Pre-distortion of sensed current in a power factor correction circuit

Patent metadata

Field	Value
Publication number	US-9343953-B2
Application number	US-201314018954-A
Country	US
Kind code	B2
Filing date	Sep 5, 2013
Priority date	Sep 5, 2013
Publication date	May 17, 2016
Grant date	May 17, 2016

Abstract

An example controller includes a power factor enhancer, an on-time controller, and a switching signal generator. The power factor enhancer is coupled to generate a pre-distortion signal each half-line cycle of an ac input voltage of a PFC converter. The on-time controller ends an on-time of a PFC switch in response to a sensed PFC switch current of the PFC converter multiplied by the pre-distortion signal. The switching signal generator controls an input current waveform of the PFC converter to substantially follow a shape of an input voltage waveform by generating a switching signal in response to the on-time controller to control switching of the PFC switch. The power factor enhancer adjusts the pre-distortion signal to pre-distort the sensed PFC switch current to compensate for distortion in the input current waveform.

First claim

What is claimed is:

1. A controller for use in a power factor correction (PFC) converter, the controller comprising:
a power factor enhancer coupled to generate a pre-distortion signal each half-line cycle of an input voltage of the PFC converter;
an on-time controller configured to generate a first signal to end an on-time of a switch of the PFC converter, wherein the first signal is generated in response to a sensed input current of the PFC converter multiplied by the pre-distortion signal;
a switching signal generator coupled to the on-time controller and configured to control an input current waveform of the PFC converter to substantially follow a shape of an input voltage waveform of the PFC converter by generating a switching signal in response to the first signal to control switching of the switch, wherein the power factor enhancer adjusts the pre-distortion signal to pre-distort the sensed input current to compensate for distortion in the input current waveform; and
an input voltage detector coupled to the power factor enhancer to generate an input voltage signal that is representative of a value of the input voltage of the PFC converter, wherein the pre-distortion signal is representative of the value of the input voltage multiplied by a variable multiplication factor, and wherein the power factor enhancer adjusts the multiplication factor to pre-distort the sensed input current,
wherein the power factor enhancer adjusts the variable multiplication factor to be greater than one for a first part of a half-line cycle of the input voltage and less than one for a second part of the half-line cycle to pre-distort the sensed input current.

2. The controller of claim 1 , wherein the power factor enhancer adjusts the variable multiplication factor to be greater than one for a first half of the half-line cycle and less than one for a second half of the half-line cycle.

3. The controller of claim 1 , wherein the variable multiplication factor linearly decreases from the value greater than one to the value less than one during each half-line cycle of the input voltage.

4. The controller of claim 1 , wherein the variable multiplication factor non-linearly decreases from the value greater than one to the value less than one during each half-line cycle of the input voltage.

5. The controller of claim 1 , wherein the variable multiplication factor exponentially decreases from the value greater than one to the value less than one during each half-line cycle of the input voltage.

6. The controller of claim 1 , wherein the variable multiplication factor decreases according to a stepwise function from the value greater than one to the value less than one during each half-line cycle of the input voltage.

7. The controller of claim 1 , wherein the value of the input voltage is a peak value of the input voltage of the PFC converter.

8. The controller of claim 1 , wherein the power factor enhancer comprises:
a first buffer coupled to apply a first gain greater than one to the input voltage signal to generate an amplified input voltage signal;
a sample and hold circuit coupled to the first buffer to sample the amplified input voltage signal in response to a zero-crossing of the input voltage to generate a first value of the pre-distortion signal; and
a second buffer coupled to apply a second gain less than one to the first value of the pre-distortion signal, wherein the sample and hold circuit is further coupled to sample an output of the second buffer to generate a second value of the pre-distortion signal.

9. The controller of claim 1 , wherein the on-time controller comprises a first comparator coupled to generate the first signal in response to comparing an error voltage signal that is representative of a load at an output of the PFC converter with a first reference voltage that is generated in response to the sensed input current multiplied by the pre-distortion signal.

10. The controller of claim 9 , further comprising:
a current source coupled to generate a first current that is proportional to the sensed input current multiplied by the pre-distortion signal; and
a first capacitor coupled to be charged with the first current when the switch is on, wherein a voltage across the capacitor is the first reference voltage.

11. The controller of claim 9 , further comprising an off-time controller configured to generate a second signal to end an off-time of the switch, wherein the off-time controller includes a second comparator coupled to generate the second signal in response to comparing an adjusted error voltage signal with a second voltage reference.

12. The controller of claim 1 , wherein the switching signal generator is configured to generate the switching signal to regulate an output of the PFC converter.

13. A power factor correction (PFC) converter, comprising:
an energy transfer element to be coupled to receive an input voltage;
a switch coupled to the energy transfer element to control a transfer of energy through the energy transfer element; and
a controller coupled to control switching of the switch, the controller comprising:
a power factor enhancer coupled to generate a pre-distortion signal each half-line cycle of the input voltage;
an on-time controller configured to generate a first signal to end an on-time of the switch, wherein the first signal is generated in response to a sensed input current of the PFC converter multiplied by the pre-distortion signal;
a switching signal generator coupled to the on-time controller and configured to control an input current waveform of the PFC converter to substantially follow a shape of an input voltage waveform of the PFC converter by generating a switching signal in response to the first signal to control switching of the switch, wherein the power factor enhancer adjusts the pre-distortion signal to pre-distort the sensed input current to compensate for distortion in the input current waveform; and
an input voltage detector coupled to the power factor enhancer to generate an input voltage signal that is representative of a value of the input voltage of the PFC converter, wherein the pre-distortion signal is representative of the value of the input voltage multiplied by a variable multiplication factor, and wherein the power factor enhancer adjusts the multiplication factor to pre-distort the sensed input current,
wherein the power factor enhancer adjusts the variable multiplication factor to be greater than one for a first part of a half-line cycle of the input voltage and less than one for a second part of the half-line cycle to pre-distort the sensed input current.

14. The PFC converter of claim 13 , wherein the power factor enhancer adjusts the variable multiplication factor to be greater than one for a first half of the half-line cycle and less than one for a second half of the half-line cycle.

15. The PFC converter of claim 13 , wherein the variable multiplication factor linearly decreases from the value greater than one to the value less than one during each half-line cycle of the input voltage.

16. The PFC converter of claim 13 , wherein the variable multiplication factor non-linearly decreases from the value greater than one to the value less than one during each half-line cycle of the input voltage.

17. The PFC converter of claim 13 , wherein the variable multiplication factor exponentially decreases from the value greater than one to the value less than one during each half-line cycle of the input voltage.

18. The PFC converter of claim 13 , wherein the variable multiplication factor decreas

Assignees

• Power Integrations Inc

Inventors

• Colbeck Roger

Classifications

• H02M1/4216 Primary

  operating from a three-phase input voltage (H02M1/4233 takes precedence) · CPC title

• H02M2001/0009

  Electricity · mapped topic

• H02M1/42 Primary

  Circuits or arrangements for compensating for or adjusting power factor in converters or inverters · CPC title

• H02M1/4225 Primary

  using a non-isolated boost converter · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title