Solar cell

US9793422B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9793422-B2
Application numberUS-201615046397-A
CountryUS
Kind codeB2
Filing dateFeb 17, 2016
Priority dateMar 19, 2010
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present invention is to grant a margin in the control of a depth of a groove when removing a transparent insulation layer after the transparent insulation layer is formed on the entire surface of the transparent conductive layer, thereby provide a solar cell which has superior productivity in mass manufacturing. A solar cell includes an n-type amorphous silicon layer formed on a front-surface side of an n-type monocrystalline silicon the substrate; a front-surface side transparent conductive layer formed on the n-type amorphous silicon layer; a p-type amorphous silicon layer formed on a rear-surface-side of the substrate; and a rear-surface-side transparent conductive layer formed on the p-type amorphous silicon layer. A front-surface side collector electrode is formed by plating on the front-surface side transparent conductive layer whereas a rear-surface-side collector electrode is formed on the rear-surface-side transparent conductive layer by printing.

First claim

Opening claim text (preview).

The invention claimed is: 1. A solar cell comprising: a crystalline semiconductor substrate of a first conductivity type; a first semiconductor layer of the first conductivity type on a first surface of the crystalline semiconductor substrate; a first collector electrode on the first semiconductor layer; a second semiconductor layer of a second conductivity type on a second surface of the crystalline semiconductor substrate; a second collector electrode on the second semiconductor layer; and a transparent conductive layer and a transparent insulation layer stacked in this order over the first semiconductor layer, wherein the first collector electrode is in a groove extending from the transparent insulation layer to the transparent conductive layer, in a cross section of the solar cell passing through the first collector electrode, a width of the groove at a boundary between the transparent insulation layer and the transparent conductive layer is larger than a width of the groove at a side of the crystalline semiconductor substrate. 2. The solar cell according to claim 1 , wherein the first and second semiconductor layers are amorphous semiconductor layers. 3. The solar cell according to claim 1 , wherein the first conductive type is an n-type and the second conductive type is a p-type. 4. The solar cell according to claim 1 , wherein in the cross section a border between the groove and the transparent conductive layer has a curved shape. 5. The solar cell according to claim 1 , wherein the first surface is a light receiving surface, and the second surface is an opposite surface to the light receiving surface. 6. The solar cell according to claim 1 , wherein the first collector electrode is formed by plating. 7. The solar cell according to claim 1 , wherein the first collector electrode has a smaller area than the second collector electrode. 8. The solar cell according to claim 1 , further comprising a second transparent conductive layer on the second semiconductor layer. 9. The solar cell according to claim 1 , wherein the second collector electrode is formed by a printing method or a vapor deposition method. 10. The solar cell according to claim 1 , wherein the groove is formed by laser machining. 11. The solar cell according to claim 1 , wherein the first collector electrode includes a plated membrane. 12. A solar cell comprising: a crystalline semiconductor substrate of a first conductivity type; a first semiconductor layer of the first conductivity type on a first surface of the crystalline semiconductor substrate; a first collector electrode on the first semiconductor layer; a second semiconductor layer of a second conductivity type on a second surface of the crystalline semiconductor substrate; a second collector electrode on the second semiconductor layer; and a transparent conductive layer and a transparent insulation layer stacked in this order over the first semiconductor layer, wherein the first collector electrode is in a groove extending to both of the transparent insulation layer and the transparent conductive layer, and a width of the groove in a top surface of the transparent insulation layer is larger than a width of the groove in a bottom surface of the transparent insulation layer. 13. A solar cell comprising: a crystalline semiconductor substrate of a first conductivity type; a first semiconductor layer of the first conductivity type on a first surface of the crystalline semiconductor substrate; a first collector electrode on the first semiconductor layer; a second semiconductor layer of a second conductivity type on a second surface of the crystalline semiconductor substrate; a second collector electrode on the second semiconductor layer; and a transparent conductive layer and a transparent insulation layer stacked in this order over the first semiconductor layer, wherein the first collector electrode is in a groove extending to both of the transparent insulation layer and the transparent conductive layer, and when the solar cell is seen along a thickness direction, an area of the groove at a boundary between the transparent insulating layer and the transparent conductive layer is larger than an area of the groove at a side of the crystalline semiconductor substrate.

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What does patent US9793422B2 cover?
The present invention is to grant a margin in the control of a depth of a groove when removing a transparent insulation layer after the transparent insulation layer is formed on the entire surface of the transparent conductive layer, thereby provide a solar cell which has superior productivity in mass manufacturing. A solar cell includes an n-type amorphous silicon layer formed on a front-surfa…
Who is the assignee on this patent?
Panasonic Ip Man Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L31/022433. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).