Heat spreader with flexible tolerance mechanism

US9793191B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9793191-B2
Application numberUS-201615345778-A
CountryUS
Kind codeB2
Filing dateNov 8, 2016
Priority dateDec 4, 2012
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device packaging system includes a substrate, a heat spreader, a stiffener attached to the substrate, and at least one die electrically coupled to the substrate and thermally coupled to the heat spreader. The semiconductor device packaging system further includes at least one stud coupled to one of the stiffener and the heat spreader and at least one orifice formed through one of the stiffener and the heat spreader. In addition, the at least one orifice is aligned with the at least one stud.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device packaging system comprising: a substrate; a heat spreader; a stiffener attached to the substrate; at least one die electrically coupled to the substrate and thermally coupled to the heat spreader; an interposer electrically coupled to the substrate, wherein the interposer is displaced between the substrate and the at least one die; at least one stud coupled to one of the stiffener and the heat spreader; and at least one orifice formed through one of the stiffener and the heat spreader, the at least one orifice aligned with the at least one stud. 2. The system of claim 1 wherein an air gap is disposed between the stiffener and the heat spreader. 3. The system of claim 2 wherein the interposer provides power connectivity and signal connectivity between the substrate and the at least one die. 4. The system of claim 2 wherein the interposer is one of a passive circuit device and an active circuit device. 5. The system of claim 1 wherein the at least one stud and the at least one orifice enables alignment of the heat spreader, the stiffener, and the least one die; and a thermal interface material is disposed between the at least one die and the heat spreader. 6. The system of claim 5 wherein the thermal interface material is compressed between the at least one die and the heat spreader. 7. The system of claim 1 wherein the at least one stud includes a plated layer, wherein the plated layer establishes a bond between the at least one stud and the heat spreader when subjected to a heating process. 8. The system of claim 7 wherein the plated layer can be one of a two-phase material and a liquid metal material. 9. The system of claim 1 wherein the at least one die is at least one of a high power device and a low power device. 10. The system of claim 1 wherein the at least one die comprises a plurality of dies, wherein at least one of the plurality of dies is a high power device and at least another of the plurality of dies is a low power device. 11. A method of assembling a semiconductor device package comprising: electrically coupling at least one die with a substrate; inserting an interposer between the at least one die and the substrate; attaching a stiffener to the substrate; coupling at least one stud to one of the stiffener and a heat spreader; forming at least one orifice through one of the stiffener and the heat spreader; aligning the at least one stud with the at least one orifice to align the heat spreader, the stiffener, and the at least one die; and thermally coupling the heat spreader with the at least one die. 12. The method of claim 11 further comprising disposing a thermal interface material between the at least one die and the heat spreader. 13. The method of claim 11 further comprising applying a plated layer to the at least one stud. 14. The method of claim 13 further comprising heating the at least one stud, the plated layer, and the orifice to establish a bond between the at least one stud and the at least one orifice. 15. A flexible tolerance heat spreader for use with a semiconductor device package, the flexible tolerance heat spreader comprising: at least one support path formed therethrough; wherein the at least one support path interacts with at least one stud coupled to a stiffener of the semiconductor device package; wherein the flexible tolerance heat spreader is variably positioned along a direction of the interaction of the at least one support path and the at least one stud to establish guidance of the fleixble tolerance heat spreader to provide thermal contact with at least one die of the substrate; and wherein the flexible tolerance heat spreader is in direct contact with the stiffener of the semiconductor device package or separated from the stiffener of the semiconductor device package by an air gap disposed therebetween. 16. The flexible tolerance heat spreader of claim 15 wherein a thermal interface material initiates thermal contact between the flexible tolerance heat spreader and the at least one die of the substrate. 17. The flexible tolerance heat spreader of claim 16 wherein the thermal interface material is deformed when the flexible tolerance heat spreader and the at least one die of the substrate are placed in thermal contact. 18. The flexible tolerance heat spreader of claim 15 wherein the at least one stud has a plated layer. 19. The flexible tolerance heat spreader of claim 18 wherein the plated layer of the at least one stud establishes a bond between the at least one stud and the flexible tolerance heat spreader when heated. 20. The flexible tolerance heat spreader of claim 18 wherein the plated layer can be one of a two-phase material and a liquid metal material.

Assignees

Inventors

Classifications

  • Fillings or auxiliary members in containers, e.g. centering rings (fillings or auxiliary members for thermal protection or control in containers or encapsulations H10W40/70) · CPC title

  • Securing means for detachable heating or cooling arrangements, e.g. clamps · CPC title

  • Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

  • Shapes or dispositions of interconnections · CPC title

  • Auxiliary members characterised by their shape · CPC title

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Frequently asked questions

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What does patent US9793191B2 cover?
A semiconductor device packaging system includes a substrate, a heat spreader, a stiffener attached to the substrate, and at least one die electrically coupled to the substrate and thermally coupled to the heat spreader. The semiconductor device packaging system further includes at least one stud coupled to one of the stiffener and the heat spreader and at least one orifice formed through one o…
Who is the assignee on this patent?
Gen Electric
What technology area does this patent fall under?
Primary CPC classification H10W40/611. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).