Semiconductor device and wafer with reference circuit and related methods

US9791346B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9791346-B1
Application numberUS-201615133614-A
CountryUS
Kind codeB1
Filing dateApr 20, 2016
Priority dateApr 20, 2016
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the optical DUTs and the second set of photodetectors.

First claim

Opening claim text (preview).

That which is claimed is: 1. A semiconductor device comprising: a semiconductor layer; and at least one reference circuit carried by said semiconductor layer, said at least one reference circuit comprising a plurality of optical devices under tests (DUTs), a first set of photodetectors coupled to outputs of said plurality of optical DUTs, at least one optical splitter coupled to inputs of said plurality of optical DUTs, and a second set of photodetectors coupled to said at least one optical splitter, said at least one optical splitter to be coupled to an optical source and configured to transmit a reference optical signal to said first set of photodetectors via said plurality of optical DUTs and said second set of photodetectors. 2. The semiconductor device of claim 1 wherein said at least one optical splitter comprises first and second optical splitters; wherein said first optical splitter is coupled to the inputs of said plurality of optical DUTs; and wherein said second optical splitter is coupled to inputs of said second set of photodetectors. 3. The semiconductor device of claim 1 wherein said at least one optical splitter comprises a single optical splitter. 4. The semiconductor device of claim 1 wherein said at least one reference circuit comprises a first plurality of output terminals respectively coupled to said first set of photodetectors. 5. The semiconductor device of claim 1 wherein said at least one reference circuit comprises a summer circuit configured to sum outputs of said second set of photodetectors. 6. The semiconductor device of claim 1 wherein said at least one reference circuit comprises a second plurality of output terminals respectively coupled to outputs of said second set of photodetectors. 7. The semiconductor device of claim 1 wherein said first set of photodetectors is spaced apart from said second set of photodetectors. 8. The semiconductor device of claim 1 wherein said at least one optical splitter comprises a balanced optical splitter. 9. The semiconductor device of claim 1 wherein said at least one reference circuit comprises a grating coupler coupled to an input of said at least one optical splitter. 10. A semiconductor wafer comprising: a semiconductor wafer device; and at least one reference circuit carried by said semiconductor wafer device, said at least one reference circuit comprising a plurality of optical devices under tests (DUTs), a first set of photodetectors coupled to outputs of said plurality of optical DUTs, at least one optical splitter coupled to inputs of said plurality of optical DUTs, and a second set of photodetectors coupled to said at least one optical splitter, said at least one optical splitter to be coupled to an optical source and configured to transmit a reference optical signal to said first set of photodetectors via said plurality of optical DUTs and said second set of photodetectors. 11. The semiconductor wafer of claim 10 wherein said at least one optical splitter comprises first and second optical splitters; wherein said first optical splitter is coupled to the inputs of said plurality of optical DUTs; and wherein said second optical splitter is coupled to inputs of said second set of photodetectors. 12. The semiconductor wafer of claim 10 wherein said at least one optical splitter comprises a single optical splitter. 13. The semiconductor wafer of claim 10 wherein said at least one reference circuit comprises a first plurality of output terminals respectively coupled to said first set of photodetectors. 14. The semiconductor wafer of claim 10 wherein said at least one reference circuit comprises a summer circuit configured to sum outputs of said second set of photodetectors. 15. The semiconductor wafer of claim 10 wherein said at least one reference circuit comprises a second plurality of output terminals respectively coupled to outputs of said second set of photodetectors. 16. The semiconductor wafer of claim 10 wherein said semiconductor wafer device comprises a plurality of integrated circuits (ICs), and a plurality of scribe lines therebetween; and wherein said at least one reference circuit is carried within said plurality of scribe lines. 17. A method for testing a semiconductor device comprising at least one reference circuit, the at least one reference circuit comprising a plurality of optical devices under tests (DUTs), a first set of photodetectors coupled to outputs of the plurality of optical DUTs, at least one optical splitter coupled to inputs of the plurality of optical DUTs, and a second set of photodetectors coupled to the at least one optical splitter, the method comprising: coupling the at least one optical splitter to an optical source for transmitting a reference optical signal to the first set of photodetectors via the plurality of optical DUTs and the second set of photodetectors; and determining an optical loss of the plurality of optical DUTs based upon a difference in electrical output between the first and second sets of photodetectors. 18. The method of claim 17 wherein the at least one optical splitter comprises first and second optical splitters; wherein the first optical splitter is coupled to the inputs of the plurality of optical DUTs; and wherein the second optical splitter is coupled to inputs of the second set of photodetectors. 19. The method of claim 17 wherein the at least one optical splitter comprises a single optical splitter. 20. The method of claim 17 wherein the at least one reference circuit comprises a first plurality of output terminals respectively coupled to the first set of photodetectors. 21. The method of claim 17 wherein the at least one reference circuit comprises a summer circuit configured to sum outputs of the second set of photodetectors. 22. The method of claim 17 wherein the at least one reference circuit comprises a second plurality of output terminals respectively coupled to outputs of the second set of photodetectors. 23. The method of claim 17 wherein the first set of photodetectors is spaced apart from the second set of photodetectors. 24. The method of claim 17 wherein the at least one optical splitter comprises a balanced optical splitter. 25. The method of claim 17 wherein the at least one reference circuit comprises a grating coupler coupled to an input of the at least one optical splitter. 26. A method for making a semiconductor device comprising: forming at least one reference circuit carried by a semiconductor wafer; and forming the at least one reference circuit to comprise a plurality of optical devices under tests (DUTs), a first set of photodetectors coupled to outputs of the plurality of optical DUTs, at least one optical splitter coupled to inputs of the plurality of optical DUTs, and a second set of photodetectors coupled to the at least one optical splitter, the at least one optical splitter to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the plurality of optical DUTs and the second set of photodetectors. 27. The method of claim 26 wherein the at least one optical splitter comprises first and second optical splitters; wherein the first optical splitter is coupled to the inputs of the plurality of optical DUTs; and wherein the second optical splitter is coupled to inputs of the second set of photodete

Assignees

Inventors

Classifications

  • using non-ionising electromagnetic radiation, e.g. optical radiation · CPC title

  • Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements {(testing printed circuit boards G01R31/2801)} · CPC title

  • of integrated circuits {(G01R31/31728 takes precedence)} · CPC title

  • using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence) · CPC title

  • Optical aspects, e.g. opto-electronics used for testing, optical signal transmission for testing electronic circuits, electro-optic components to be tested in combination with electronic circuits, measuring light emission of digital circuits (probes having electro-optic elements G01R1/071; electro-optic sampling for oscilloscopes G01R13/347; contactless testing of individual semiconductor devices by optical means G01R31/2656) · CPC title

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What does patent US9791346B1 cover?
A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coup…
Who is the assignee on this patent?
St Microelectronics Sa, St Microelectronics Crolles 2 Sas
What technology area does this patent fall under?
Primary CPC classification G01M11/02. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).