Manufacturing method of multilayer printed wiring board

US9788439B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9788439-B2
Application numberUS-201415022292-A
CountryUS
Kind codeB2
Filing dateMar 26, 2014
Priority dateSep 20, 2013
Publication dateOct 10, 2017
Grant dateOct 10, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wiring substrate is manufactured by attaching an adhesive protective film to a metal-foiled laminate sheet, forming bottomed via holes by partially removing the film and an insulating film, filling conductive pastes into the holes, and peeling the film. A wiring substrate is manufactured by forming an adhesive protective layer so as to cover a patterned metal foil on a metal-foiled laminate sheet, forming bottomed step via holes by partially removing the layer and an insulating film, filling conductive pastes into the holes, and peeling off a protective film. The wiring substrate and the second wiring substrate are laminated in such a way that protruding parts of the pastes come into contact with respective protruding parts of the pastes.

First claim

Opening claim text (preview).

The invention claimed is: 1. A manufacturing method of a multilayer printed wiring board comprising: attaching an adhesive protective film having a weak adhesive layer formed on one side thereof to a single-sided metal-foiled laminate sheet having a first insulating resin film and a first metal foil on a front face of the first insulating resin film in such a way that the weak adhesive layer contacts with a rear face of the first insulating resin film; forming a bottomed via hole that has a bottom face with the first metal foil exposed therefrom by partially removing the adhesive protective film and the first insulating resin film; first printing of filling a conductive paste into the bottomed via hole by a printing method; peeling off the adhesive protective film from the first insulating resin film and causing a part of the conductive paste filled in the bottomed via hole to protrude from the first insulating resin film to obtain a first wiring substrate; forming, on a double-sided metal-foiled laminate sheet having a second insulating resin film and second and third metal foils respectively provided on a front face and a rear face of the second insulating resin film, a piercing mask by patterning the second metal foil; forming an adhesive protective layer including an adhesive-agent layer that covers the front face of the second insulating resin film and buries the patterned second metal foil and a protective film that is laminated on the adhesive-agent layer; forming a bottomed step via hole that has a middle part with the piercing mask exposed therefrom and a bottom face with the third metal foil exposed therefrom by partially removing the adhesive protective layer and the second insulating resin film; second printing of filling a conductive paste into the bottomed step via hole by a printing method; peeling off the protective film from the adhesive-agent layer and causing a part of the conductive paste filled in the bottomed step via hole to protrude from the adhesive-agent layer to obtain a second wiring substrate; and laminating in which the first wiring substrate and the second wiring substrate are laminated in such a way that a protruding part of the conductive paste filled in the bottomed via hole of the first wiring substrate comes into contact with a protruding part of the conductive paste filled in the bottomed step via hole of the second wiring substrate, and the laminated first and second wiring substrates are heated to be integrated with each other. 2. The manufacturing method of a multilayer printed wiring board according to claim 1 , wherein heating is performed at a predetermined laminating-process temperature in the laminating, thereby achieving metal bonding among metal particles included in the conductive pastes filled in the bottomed via hole and the bottomed step via hole and metal bonding among the metal particles and the first to third metal foils, and substantially completing heat-curing reaction of resin binder included in the conductive pastes and the adhesive-agent layer. 3. The manufacturing method of a multilayer printed wiring board according to claim 1 , wherein in the first printing and/or the second printing, a conductive paste that includes metal particles made of In, SnIn, or SnBi is used. 4. The manufacturing method of a multilayer printed wiring board according to claim 1 , wherein the first to third metal foils are copper foils, and in the first printing and/or the second printing, a conductive paste that includes metal particles made of Sn, Zn, Al, Ag, Ni, Cu or an alloy of these metals is used. 5. The manufacturing method of a multilayer printed wiring board according to claim 1 , wherein before the laminating, the first metal foil and the third metal foil are patterned to form respective predetermined wiring patterns. 6. The manufacturing method of a multilayer printed wiring board according to claim 1 , wherein after the laminating, the first metal foil and the third metal foil are patterned to form respective predetermined wiring patterns. 7. The manufacturing method of a multilayer printed wiring board according to claim 6 , wherein the first metal foil and the third metal foil are simultaneously patterned by both-side simultaneous exposure. 8. The manufacturing method of a multilayer printed wiring board according to claim 1 , further comprising: forming, in a second single-sided metal-foiled laminate sheet having a third insulating resin film and a fourth metal foil on a rear face of the third insulating resin film, a second adhesive protective layer having a second adhesive-agent layer that covers a front face of the third insulating resin film and a second protective film that is laminated on the adhesive-agent layer; forming a second bottomed via hole having a bottom face with the fourth metal foil exposed therefrom by partially removing the second adhesive protective layer and the third insulating resin film; filling a conductive paste into the second bottomed via hole by a printing method; and peeling off the second protective film from the second adhesive-agent layer and causing a part of the conductive paste filled in the second bottomed via hole to protrude from the second adhesive-agent layer, thereby obtaining a third wiring substrate, wherein in the laminating, the first to third wiring substrates are laminated in such a way that a protruding part of the conductive paste filled in the second bottomed via hole of the third wiring substrate comes into contact with a reception land that is formed by patterning the third metal foil of the second wiring substrate.

Assignees

Inventors

Classifications

  • Temporary protective insulating layer · CPC title

  • Dispersed materials, e.g. conductive pastes or inks · CPC title

  • Assembling formed circuit to base · CPC title

  • characterized by laminating only or mainly similar single-sided circuit boards · CPC title

  • Multilayer circuits · CPC title

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What does patent US9788439B2 cover?
A wiring substrate is manufactured by attaching an adhesive protective film to a metal-foiled laminate sheet, forming bottomed via holes by partially removing the film and an insulating film, filling conductive pastes into the holes, and peeling the film. A wiring substrate is manufactured by forming an adhesive protective layer so as to cover a patterned metal foil on a metal-foiled laminate s…
Who is the assignee on this patent?
Nippon Mektron Kk
What technology area does this patent fall under?
Primary CPC classification H05K3/4069. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).